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arm64: dts: renesas: r9a09g047: Add I2C nodes
Add I2C{0..8} nodes to RZ/G3E (R9A09G047) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241216120029.143944-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das
committed by
Geert Uytterhoeven
Geert Uytterhoeven
parent
24bfc042ba
commit
acb247afab
@@ -162,6 +162,195 @@ scif0: serial@11c01400 {
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status = "disabled";
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};
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i2c0: i2c@14400400 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14400400 0 0x400>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 507 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 506 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x94>;
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resets = <&cpg 0x98>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@14400800 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14400800 0 0x400>;
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interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 509 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 508 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x95>;
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resets = <&cpg 0x99>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@14400c00 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14400c00 0 0x400>;
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interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 511 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 510 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x96>;
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resets = <&cpg 0x9a>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c3: i2c@14401000 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14401000 0 0x400>;
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interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 513 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 512 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x97>;
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resets = <&cpg 0x9b>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c4: i2c@14401400 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14401400 0 0x400>;
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interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 515 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 514 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x98>;
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resets = <&cpg 0x9c>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c5: i2c@14401800 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14401800 0 0x400>;
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interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 517 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 516 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x99>;
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resets = <&cpg 0x9d>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c6: i2c@14401c00 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14401c00 0 0x400>;
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interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 519 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 518 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x9a>;
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resets = <&cpg 0x9e>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c7: i2c@14402000 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x14402000 0 0x400>;
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interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 521 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 520 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x9b>;
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resets = <&cpg 0x9f>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c8: i2c@11c01000 {
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compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
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reg = <0 0x11c01000 0 0x400>;
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interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 523 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 522 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tei", "ri", "ti", "spi", "sti",
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"naki", "ali", "tmoi";
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clocks = <&cpg CPG_MOD 0x93>;
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resets = <&cpg 0xa0>;
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power-domains = <&cpg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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gic: interrupt-controller@14900000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0x14900000 0 0x20000>,
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