Matthias Kaehlcke
7cee5c7428
arm64: dts: qcom: sc7180: Fix node order
...
The SC7180 device tree nodes should be ordered by address. Re-shuffle
some nodes which currently don't follow this convention.
Since we are already moving it add a missing leading zero to the
address in the 'reg' property of the 'interrupt-controller@b220000'
node.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org >
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191212170824.v2.1.I55198466344789267ed1eb5ec555fd890c9fc6e1@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-17 21:35:44 -08:00
Jeffrey Hugo
8529728f25
arm64: dts: qcom: msm8998: Fixup uart3 gpio config for bluetooth
...
It turns out that the wcn3990 can float the gpio lines during bootup, etc
which will result in the uart core thinking there is incoming data. This
results in the bluetooth stack getting garbage. By applying a bias to
match what wcn3990 would drive, the issue is corrected.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20191021161921.31825-1-jeffrey.l.hugo@gmail.com
[bjorn: Moved board specific pinctrl states to the end]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-17 21:26:58 -08:00
Stephen Boyd
39523c56b6
arm64: dts: qcom: sdm845-cheza: Add cr50 spi node
...
Add the cr50 device to the spi controller it is attached to. This
enables /dev/tpm0 and some login things on Cheza.
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Cc: Douglas Anderson <dianders@chromium.org >
Signed-off-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191216234204.190769-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-16 19:10:11 -08:00
Sibi Sankar
61025b815e
arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI smp2p
...
Add the SMP2P nodes for the remoteproc states for ADSP, CDSP, MPSS and
SLPI remoteprocs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org >
Link: https://lore.kernel.org/r/0101016e80793dfa-9d0f6e93-01db-4c95-a226-d64bb50238cb-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-16 15:45:57 -08:00
Douglas Anderson
fd91651664
arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper
...
The bindings for the QMP PHY are truly strange. I believe (?) that
they may have originated because with PCIe each lane is treated as a
different PHY and the same PHY driver is used for a whole bunch of
things (incluidng PCIe).
In any case, now that we have "make dtbs_check", we find that having
the outer node named "phy" triggers the
"schemas/phy/phy-provider.yaml" schema, yelling about:
phy@88e9000: '#phy-cells' is a required property
Let's call the outer node the "phy-wrapper" and the inner node the
"phy" to make dtbs_check happy.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191212113540.6.Iec10b23bb000186b36b8bacfb6789d8233de04a7@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-12 15:18:41 -08:00
Douglas Anderson
3f155dbebf
arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan
...
This is just like commit e77cc85ee3 ("arm64: dts: qcom: sdm845:
remove macro from unit name"). It fixes the error in 'make
dtbs_check':
arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: adc@3100: 'adc-chan@0x06' does not match any of the regexes: ...
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Fixes: a727ec1232 ("arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals")
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191212113540.4.I5f67a5ed7665f658c95447a837cbd0021e1dc689@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-12 15:15:23 -08:00
Douglas Anderson
6e3697279e
arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy
...
Running "dtbs_check" yells:
'#clock-cells' is a dependency of 'clock-output-names'
...and sure enough the bindings say we should have "#clock-cells".
Add it.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191212113540.3.Ia530e4065ca81f55ac8f89a400f6a0a084ff6712@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-12 15:15:17 -08:00
Douglas Anderson
ac00546a67
arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller
...
Running `make dtbs_check` yells:
arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: interrupt-controller@17a00000: gic-its@17a40000: False schema
From "arm,gic-v3.yaml" we can grok that this is explained by the
comment "msi-controller is preferred". Switch to the preferred name
so that dtbs_check stops yelling.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191212113540.2.Ibad7d3b0bea02957e89047942c61cc6c0aa61715@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-12 15:15:08 -08:00
Douglas Anderson
d8c5133583
arm64: dts: qcom: sc7180: Add SoC name to compatible
...
Running `make dtbs_check` yells because qcom.yaml says that we should
have:
- items:
- enum:
- qcom,sc7180-idp
- const: qcom,sc7180
...but we're missing "qcom,sc7180". Add it.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191212113540.1.I158061c65974bf0f653ceb79b442b76a1fd64868@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-12 15:14:59 -08:00
Sibi Sankar
017e7856ed
arm64: dts: sm8150: Add rpmh power-domain node
...
Add the DT node for the rpmhpd power controller.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org >
Signed-off-by: Sibi Sankar <sibis@codeaurora.org >
Link: https://lore.kernel.org/r/0101016e7f99eab9-35efa01f-8ed3-4a77-87e1-09c381173121-000000@us-west-2.amazonses.com
[bjorn: Use constant for opp6, until include lands]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-11 23:33:46 -08:00
Rajendra Nayak
9868a31c31
arm64: dts: sc7180: Add aliases for all i2c and spi devices
...
Add aliases for all i2c and spi nodes
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/0101016ef3cded0a-f85e1f98-f3be-4f6f-805f-82f8b6a83e14-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-11 22:51:16 -08:00
Rajendra Nayak
d8b076b891
arm64: dts: sc7180: Remove additional spi chip select muxes
...
remove the additional CS muxes that were added by default for
spi so every board using sc7180 does not have to override it.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Reviewed-by: Douglas Anderson <dianders@chromium.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/0101016ef3cdad4a-cbfbc482-1f74-4cb7-88fc-b4b6ed7e7543-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-11 22:51:04 -08:00
Loic Poulain
4868f573a7
arm: dts: qcom: db410c: Enable USB OTG support
...
The Dragonboard-410c is able to act either as USB Host or Device.
The role can be determined at runtime via the USB_HS_ID pin which is
derived from the micro-usb port VBUS pin.
In Host role, SoC USB D+/D- are routed to the onboard USB 2.0 HUB.
In Device role, SoC USB D+/D- are routed to the USB 2.0 micro B port.
Routing is selected via USB_SW_SEL_PM gpio.
In device role USB HUB can be held in reset.
chipidea driver expects two extcon device pointers, one for the
EXTCON_USB event and one for the EXTCON_USB_HOST event. Since
the extcon-usb-gpio device is capable of generating both these
events, point two times to this extcon device.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org >
Link: https://lore.kernel.org/r/1576083014-5842-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-11 22:48:37 -08:00
Stephan Gerhold
741a5ea7a6
arm64: dts: qcom: pm8916: Add vibration motor node
...
PM8916 has one vibration motor driver that is already supported
by the pm8xxx-vibrator driver.
Add a node describing it to pm8916.dtsi.
Keep it disabled by default since not all devices make use of it.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net >
Link: https://lore.kernel.org/r/20191211192906.56638-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-11 22:40:35 -08:00
Sandeep Maheswaram
0b766e7fe5
arm64: dts: qcom: sc7180: Add USB related nodes
...
Add nodes for DWC3 USB controller, QMP and QUSB PHYs.
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/1573795421-13989-2-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:49:02 -08:00
Rajeshwari
82bdc93972
arm64: dts: qcom: sc7180: Add device node support for TSENS in SC7180
...
Add TSENS node and user thermal zone for TSENS sensors in SC7180.
Signed-off-by: Rajeshwari <rkambl@codeaurora.org >
Link: https://lore.kernel.org/r/1574934847-30372-2-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:46:25 -08:00
Jeffrey Hugo
876a757370
arm64: dts: qcom: msm8998: Add gpucc node
...
Add MSM8998 GPU Clock Controller DT node.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20191031185806.15602-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:42:25 -08:00
Vinod Koul
3e5bf28d2c
arm64: dts: qcom: sm8150-mtp: Enable UFS nodes
...
Enable the UFS HC and phy nodes and add regulators used by these.
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20191106084656.1749954-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:34:15 -08:00
Vinod Koul
3834a2e922
arm64: dts: qcom: sm8150: Add ufs nodes
...
Add the ufs hc node and ufs phy nodes found in SM8150
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20191106084656.1749954-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:34:14 -08:00
Vinod Koul
d6f55763c7
arm64: dts: qcom: Use gcc clock enums
...
Now that header defining gcc clocks is upstream, use the enums instead
of numbers
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20191106084604.1746544-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:28:58 -08:00
Taniya Das
86899d8235
arm64: dts: sc7180: Add cpufreq HW node for cpu scaling
...
cpufreq hw node required to scale CPU frequency on sc7180.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org >
Signed-off-by: Taniya Das <tdas@codeaurora.org >
Link: https://lore.kernel.org/r/0101016ed02b6356-5165eaaa-6c54-47ff-a008-821c91831e56-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:15:06 -08:00
Manu Gautam
d026c96b25
arm64: dts: qcom: msm8996: Disable USB2 PHY suspend by core
...
QUSB2 PHY on msm8996 doesn't work well when autosuspend by
dwc3 core using USB2PHYCFG register is enabled. One of the
issue seen is that PHY driver reports PLL lock failure and
fails phy_init() if dwc3 core has USB2 PHY suspend enabled.
Fix this by using quirks to disable USB2 PHY LPM/suspend and
dwc3 core already takes care of explicitly suspending PHY
during suspend if quirks are specified.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org >
Signed-off-by: Paolo Pisati <p.pisati@gmail.com >
Link: https://lore.kernel.org/r/20191209151501.26993-1-p.pisati@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 23:11:41 -08:00
Sai Prakash Ranjan
c831fa2999
arm64: dts: qcom: sc7180: Add Last level cache controller node
...
Add device tree node for LLCC aka system cache controller for
SC7180 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org >
Link: https://lore.kernel.org/r/0101016ef3394291-2290a8be-91c9-4d46-b5ca-acd5277eb6e2-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 22:51:23 -08:00
Sai Prakash Ranjan
fb2d815006
arm64: dts: qcom: sm8150: Add APSS watchdog node
...
Add APSS (Application Processor Subsystem) watchdog
DT node for SM8150 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org >
Link: https://lore.kernel.org/r/0101016ef3393092-487ddf4a-2e17-40f0-8161-3e686a7b57dc-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 22:51:13 -08:00
Sai Prakash Ranjan
4722f95646
arm64: dts: qcom: sc7180: Add APSS watchdog node
...
Add APSS (Application Processor Subsystem) watchdog
DT node for SC7180 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org >
Link: https://lore.kernel.org/r/0101016ef3391ce3-438cca2f-458c-47d9-a62a-381f1c6bfb15-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 22:50:29 -08:00
Sai Prakash Ranjan
39abbd3087
arm64: dts: sdm845: Update the device tree node for LLCC
...
LLCC cache-controller was renamed to system-cache-controller
to make schema pass the dt binding check. Update the device
tree node to reflect this change.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org >
Link: https://lore.kernel.org/r/a2bb92de65e90768bf1d6b8c0b7fbd43cba704d2.1573814758.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 22:43:33 -08:00
Douglas Anderson
a0f9639033
arm64: dts: sc7180: Add a comment to i2c7 about external pullup
...
Make i2c7 symmetric with the other i2c busses and comment that we have
no internal pull because there is an external one.
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org >
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191210163530.2.I8d4cbb3d7ac5824f8e950c53038df8c27a512905@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 22:41:07 -08:00
Douglas Anderson
15f1eae346
arm64: dts: sc7180: Fix indentation/ordering of qspi nodes in sc7180-idp
...
The qspi pinctrl nodes had the wrong indentation and sort ordering and
the main qspi node was placed down in the pinctrl section. Fix.
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org >
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org >
Link: https://lore.kernel.org/r/20191210163530.1.I69a6c29e08924229d160b651769c84508a07b3c6@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 22:40:38 -08:00
Amit Kucheria
809b3c51e6
arm64: dts: msm8916: thermal: Add interrupt support
...
Register upper-lower interrupt for the tsens controller.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org >
Link: https://lore.kernel.org/r/88eff964b708c8aff57b24370d2e14389ace09e9.1572526427.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 21:23:28 -08:00
Lina Iyer
aeae948f6a
arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845
...
PDC always-on interrupt controller can detect certain GPIOs even when
the TLMM interrupt controller is powered off. Link the PDC as TLMM's
wakeup parent.
Signed-off-by: Lina Iyer <ilina@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/1573855915-9841-12-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:42:01 -08:00
Lina Iyer
72b67ebf9d
arm64: dts: qcom: add PDC interrupt controller for SDM845
...
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer <ilina@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/1573855915-9841-11-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:42:01 -08:00
Jeffrey Hugo
05caa5bf9c
arm64: dts: qcom: msm8998: Fix tcsr syscon size
...
The tcsr syscon region is really 0x40000 in size. We need access to the
full region so that we can access the axi resets when managing the
modem subsystem.
Fixes: c783394956 ("arm64: dts: qcom: msm8998: Add smem related nodes")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20191107045948.4341-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:42:00 -08:00
Jeffrey Hugo
19b7caaa93
arm64: dts: qcom: msm8998: Add wifi node
...
Add the wifi node and required reserved memory to enable the wlan
hardware. Enable the wifi node in both the mtp and clamshell platforms
after adding the relevant regulators for each platform.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20191107043313.4055-3-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:42:00 -08:00
Jeffrey Hugo
a21c954821
arm64: dts: qcom: msm8998: Add anoc2 smmu node
...
While there are several peripherals on the anoc2, most are not behind the
smmu. However, the SoC integrated wlan block is behind the smmu, so we'll
need to control the smmu inorder to enable wifi.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com >
Link: https://lore.kernel.org/r/20191107043313.4055-2-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:59 -08:00
Roja Rani Yarubandi
ba3fc64963
arm64: dts: sc7180: Add qupv3_0 and qupv3_1
...
Add QUP SE instances configuration for sc7180.
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-14-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:59 -08:00
Taniya Das
0def3f14c5
arm64: dts: qcom: SC7180: Add node for rpmhcc clock driver
...
Add node for rpmhcc clock driver.
Signed-off-by: Taniya Das <tdas@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-13-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:59 -08:00
Kiran Gunda
b62e108da5
arm64: dts: qcom: sc7180-idp: Add RPMh regulators
...
Add the rpmh regulators for the sc7180 idp platform. This platform
consists of PMIC PM6150 and PM6150l
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/20191108092824.9773-12-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:58 -08:00
Kiran Gunda
a727ec1232
arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals
...
Add PM6150/PM6150L peripherals such as PON, GPIOs, ADC and other
PMIC infra modules.
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-11-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:58 -08:00
Kiran Gunda
0f9dc5f09f
arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device
...
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-10-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:58 -08:00
Maulik Shah
22f185ee81
arm64: dts: qcom: sc7180: Add pdc interrupt controller
...
Add pdc interrupt controller for sc7180
Signed-off-by: Maulik Shah <mkshah@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-9-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:57 -08:00
Maulik Shah
fec6359c28
arm64: dts: qcom: sc7180: Add rpmh-rsc node
...
Add device bindings for the application processor's rsc. The rsc
contains the TCS that are used for communicating with the hardened
resource accelerators on Qualcomm Technologies, Inc. (QTI) SoCs.
Signed-off-by: Maulik Shah <mkshah@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-6-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:57 -08:00
Maulik Shah
e0abc5eb52
arm64: dts: qcom: sc7180: Add cmd_db reserved area
...
Command_db provides mapping for resource key and address managed
by remote processor. Add cmd_db reserved memory area.
Signed-off-by: Maulik Shah <mkshah@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-5-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:56 -08:00
Vivek Gautam
d66df6248a
arm64: dts: sc7180: Add device node for apps_smmu
...
Adding device node for APPS SMMU that is connected to
devices such as display, video, usb, mmc, etc. on SC7180
chipset.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-4-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:56 -08:00
Rajendra Nayak
90db71e480
arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc
...
Add skeletal sc7180 SoC dtsi and idp board dts files.
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Co-developed-by: Taniya Das <tdas@codeaurora.org >
Signed-off-by: Taniya Das <tdas@codeaurora.org >
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Link: https://lore.kernel.org/r/20191108092824.9773-3-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:55 -08:00
Rajendra Nayak
f1cbee2d87
dt-bindings: qcom: Add SC7180 bindings
...
Add a SoC string 'sc7180' for the qualcomm SC7180 SoC.
Also add a new board type 'idp'
While at it, also sort the SoC and board names in
alphabetical order, and also fix the weird space
and tab combinations found in the file.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Reviewed-by: Rob Herring <robh@kernel.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Link: https://lore.kernel.org/r/20191108092824.9773-2-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:55 -08:00
Amit Kucheria
e68ca6b6fd
arm64: dts: sdm845: thermal: Add critical interrupt support
...
Register critical interrupts for each of the two tsens controllers
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org >
Link: https://lore.kernel.org/r/c536e9cdb448bbad3441f6580fa57f1f921fb580.1573499020.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2019-12-10 09:41:55 -08:00
Linus Torvalds
e42617b825
Linux 5.5-rc1
v5.5-rc1
2019-12-08 14:57:55 -08:00
Linus Torvalds
95e6ba5133
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
...
Pull networking fixes from David Miller:
1) More jumbo frame fixes in r8169, from Heiner Kallweit.
2) Fix bpf build in minimal configuration, from Alexei Starovoitov.
3) Use after free in slcan driver, from Jouni Hogander.
4) Flower classifier port ranges don't work properly in the HW offload
case, from Yoshiki Komachi.
5) Use after free in hns3_nic_maybe_stop_tx(), from Yunsheng Lin.
6) Out of bounds access in mqprio_dump(), from Vladyslav Tarasiuk.
7) Fix flow dissection in dsa TX path, from Alexander Lobakin.
8) Stale syncookie timestampe fixes from Guillaume Nault.
[ Did an evil merge to silence a warning introduced by this pull - Linus ]
* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (84 commits)
r8169: fix rtl_hw_jumbo_disable for RTL8168evl
net_sched: validate TCA_KIND attribute in tc_chain_tmplt_add()
r8169: add missing RX enabling for WoL on RTL8125
vhost/vsock: accept only packets with the right dst_cid
net: phy: dp83867: fix hfs boot in rgmii mode
net: ethernet: ti: cpsw: fix extra rx interrupt
inet: protect against too small mtu values.
gre: refetch erspan header from skb->data after pskb_may_pull()
pppoe: remove redundant BUG_ON() check in pppoe_pernet
tcp: Protect accesses to .ts_recent_stamp with {READ,WRITE}_ONCE()
tcp: tighten acceptance of ACKs not matching a child socket
tcp: fix rejected syncookies due to stale timestamps
lpc_eth: kernel BUG on remove
tcp: md5: fix potential overestimation of TCP option space
net: sched: allow indirect blocks to bind to clsact in TC
net: core: rename indirect block ingress cb function
net-sysfs: Call dev_hold always in netdev_queue_add_kobject
net: dsa: fix flow dissection on Tx path
net/tls: Fix return values to avoid ENOTSUPP
net: avoid an indirect call in ____sys_recvmsg()
...
2019-12-08 13:28:11 -08:00
Linus Torvalds
138f371ddf
Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
...
Pull more SCSI updates from James Bottomley:
"Eleven patches, all in drivers (no core changes) that are either minor
cleanups or small fixes.
They were late arriving, but still safe for -rc1"
* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
scsi: MAINTAINERS: Add the linux-scsi mailing list to the ISCSI entry
scsi: megaraid_sas: Make poll_aen_lock static
scsi: sd_zbc: Improve report zones error printout
scsi: qla2xxx: Fix qla2x00_request_irqs() for MSI
scsi: qla2xxx: unregister ports after GPN_FT failure
scsi: qla2xxx: fix rports not being mark as lost in sync fabric scan
scsi: pm80xx: Remove unused include of linux/version.h
scsi: pm80xx: fix logic to break out of loop when register value is 2 or 3
scsi: scsi_transport_sas: Fix memory leak when removing devices
scsi: lpfc: size cpu map by last cpu id set
scsi: ibmvscsi_tgt: Remove unneeded variable rc
2019-12-08 12:23:42 -08:00
Linus Torvalds
a78f7cdddb
Merge tag '5.5-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6
...
Pull cifs fixes from Steve French:
"Nine cifs/smb3 fixes:
- one fix for stable (oops during oplock break)
- two timestamp fixes including important one for updating mtime at
close to avoid stale metadata caching issue on dirty files (also
improves perf by using SMB2_CLOSE_FLAG_POSTQUERY_ATTRIB over the
wire)
- two fixes for "modefromsid" mount option for file create (now
allows mode bits to be set more atomically and accurately on create
by adding "sd_context" on create when modefromsid specified on
mount)
- two fixes for multichannel found in testing this week against
different servers
- two small cleanup patches"
* tag '5.5-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6:
smb3: improve check for when we send the security descriptor context on create
smb3: fix mode passed in on create for modetosid mount option
cifs: fix possible uninitialized access and race on iface_list
cifs: Fix lookup of SMB connections on multichannel
smb3: query attributes on file close
smb3: remove unused flag passed into close functions
cifs: remove redundant assignment to pointer pneg_ctxt
fs: cifs: Fix atime update check vs mtime
CIFS: Fix NULL-pointer dereference in smb2_push_mandatory_locks
2019-12-08 12:12:18 -08:00