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arm64: dts: sc7180: Fix indentation/ordering of qspi nodes in sc7180-idp

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The qspi pinctrl nodes had the wrong indentation and sort ordering and
the main qspi node was placed down in the pinctrl section.  Fix.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.1.I69a6c29e08924229d160b651769c84508a07b3c6@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Douglas Anderson
2019-12-10 16:35:39 -08:00
committed by Bjorn Andersson
parent 809b3c51e6
commit 15f1eae346
1 changed files with 37 additions and 36 deletions
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73
arch/arm64/boot/dts/qcom/sc7180-idp.dts
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@@ -232,6 +232,20 @@ vreg_bob: bob {
};
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
spi-tx-bus-width = <2>;
spi-rx-bus-width = <2>;
};
};
&qupv3_id_0 {
status = "okay";
};
@@ -250,6 +264,29 @@ &uart8 {
/* PINCTRL - additions to nodes defined in sc7180.dtsi */
&qspi_clk {
pinconf {
pins = "gpio63";
bias-disable;
};
};
&qspi_cs0 {
pinconf {
pins = "gpio68";
bias-disable;
};
};
&qspi_data01 {
pinconf {
pins = "gpio64", "gpio65";
/* High-Z when no transfers; nice to park the lines */
bias-pull-up;
};
};
&qup_i2c2_default {
pinconf {
pins = "gpio15", "gpio16";
@@ -364,39 +401,3 @@ pinconf {
};
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
spi-tx-bus-width = <2>;
spi-rx-bus-width = <2>;
};
};
&qspi_cs0 {
pinconf {
pins = "gpio68";
bias-disable;
};
};
&qspi_clk {
pinconf {
pins = "gpio63";
bias-disable;
};
};
&qspi_data01 {
pinconf {
pins = "gpio64", "gpio65";
/* High-Z when no transfers; nice to park the lines */
bias-pull-up;
};
};