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Rajendra Nayak
7a85cecf98 dt-bindings: arm: qcom: Document X1E80100 SoC and boards 
Document the X1E80100 SoC binding and also the boards using it.
Also document the new board id qcp (Qualcomm Compute Platform).

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231205062403.14848-3-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 20:26:01 -08:00
Rajendra Nayak
bfea2924fc dt-bindings: arm: cpus: Add qcom,oryon compatible 
Oryon is the custom ARM CPU core implementation used in Qualcomm's
X1E80100 SoC, document it.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Link: https://lore.kernel.org/r/20231205062403.14848-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 20:25:33 -08:00
Bjorn Andersson
779266b127 Merge branch 'icc-x1e80100' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8 
Merge the X1E80100 interconnect binding to get access to the
interconnect port constants.
 2023-12-07 20:24:09 -08:00
Bjorn Andersson
d64254b46a Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into arm64-for-6.8 
Merge the X1E80100 clock bindings to get access to the clock constants.
 2023-12-07 20:22:50 -08:00
Rajendra Nayak
4c413512ed dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100 
Add bindings and update documentation for clock rpmh driver on X1E80100
SoCs.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231205061002.30759-4-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 20:18:22 -08:00
Rajendra Nayak
4dc7e7d2ee dt-bindings: clock: qcom: Add X1E80100 GCC clocks 
Add device tree bindings for global clock controller on X1E80100 SoCs.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231205061002.30759-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 20:18:21 -08:00
Krzysztof Kozlowski
80627a5d72 arm64: dts: qcom: sm8650-mtp: add WSA8845 speakers 
Add nodes for WSA8845 speakers on SM8650 MTP board.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231204155746.302323-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:30:11 -08:00
Krzysztof Kozlowski
6a45a90c0c arm64: dts: qcom: sm8650: add Soundwire controllers 
Add nodes for LPASS Soundwire v2.0.0 controllers.  Use labels with
indices matching downstream DTS, to make any comparisons easier.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231204155746.302323-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:30:11 -08:00
Krzysztof Kozlowski
58872a54e4 arm64: dts: qcom: sm8650: add ADSP audio codec macros 
Add the Low Power Audio SubSystem (LPASS) / ADSP audio codec macros on
Qualcomm SM8650.  The nodes are very similar to SM8550.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231204155746.302323-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:30:11 -08:00
Krzysztof Kozlowski
2d6bc13321 arm64: dts: qcom: sm8650: add LPASS LPI pin controller 
Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin
controller device node as part of audio subsystem in Qualcomm SM8650
SoC.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231204155746.302323-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:30:11 -08:00
Krzysztof Kozlowski
ff28260e3d arm64: dts: qcom: sm8650: add ADSP GPR 
Add the ADSP Generic Packet Router (GPR) device node as part of audio
subsystem in Qualcomm SM8650 SoC.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231204155746.302323-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:30:11 -08:00
Neil Armstrong
83c054b913 arm64: dts: qcom: sm8650-qrd: enable IPA 
Enable IPA on the SM8650 QRD.  The GSI firmware on this platform is
loaded by the AP.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231201-topic-sm8650-upstream-ipa-v1-2-7e8cf7200cd2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:21:41 -08:00
Neil Armstrong
9fdddbd134 arm64: dts: qcom: sm8650: add IPA information 
Add IPA-related nodes and definitions to SM8650 dtsi,
which uses IPA v5.5.1 a minor revision of v5.5 found
in the SM8550 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231201-topic-sm8650-upstream-ipa-v1-1-7e8cf7200cd2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:21:41 -08:00
Neil Armstrong
0c5b1016b5 arm64: dts: qcom: sm8650-qrd: add interconnect dependent device nodes 
Now interconnect dependent devices are added in sm8650 DTSI,
now enable more devices for the Qualcomm SM8650 QRD board:
- PCIe
- Display
- DSPs
- SDCard
- UFS
- USB role switch with PMIC Glink
- Bluetooth

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-8-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Neil Armstrong
deb63527ab arm64: dts: qcom: sm8650-mtp: add interconnect dependent device nodes 
Now interconnect dependent devices are added in sm8650 DTSI,
now enable more devices for the Qualcomm SM8650 MTP board:
- PCIe
- Display
- DSPs
- SDCard
- UFS
- USB role switch with PMIC Glink

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-7-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Neil Armstrong
10e0246712 arm64: dts: qcom: sm8650: add interconnect dependent device nodes 
Add Hardware nodes that depends on an interconnect property to
be valid.

The includes:
- all QUP i2s/spi nodes
- PCIe
- UFS
- SDHCI
- Display
- HWMON

Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-6-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Neil Armstrong
a834911d50 arm64: dts: qcom: sm8650: add initial SM8650 QRD dts 
Add initial QRD (Qualcomm Reference Device) DT, it supports
boot to shell with buttons, leds and USB peripheral.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-5-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Neil Armstrong
6fbdb3c1fa arm64: dts: qcom: sm8650: add initial SM8650 MTP dts 
Add initial QRD (Qualcomm Reference Device) DT,
only boots to shell with USB device support.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-4-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Neil Armstrong
707060bf2a arm64: dts: qcom: pm8550ve: make PMK8550VE SID configurable 
The pm8550ve can be found with a different SID on SM8650 platforms,
make it configurable.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-3-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Neil Armstrong
d235037799 arm64: dts: qcom: add initial SM8650 dtsi 
Add initial DTSI for the Qualcomm SM8650 platform,
only contains nodes which doesn't depend on interconnect.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-2-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Neil Armstrong
78804eecbe dt-bindings: arm: qcom: document SM8650 and the reference boards 
Document the SM8650 SoC and based MTP (Mobile Test Platforms) and QRD
(Qualcomm Reference Device) boards.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-1-b25fb781da52@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 19:19:31 -08:00
Bjorn Andersson
5ceab14eb6 Merge branch 'icc-sm8650' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8 
Merge the SM8650 interconnect binding, to gain access to the
interconnect port constants.
 2023-12-07 19:18:08 -08:00
Bjorn Andersson
40d9c6ea64 Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into arm64-for-6.8 
Merge the SM8650 clock bindings, to gain access to the clock constants.
 2023-12-07 19:16:43 -08:00
Luka Panio
264beb3cbd arm64: dts: qcom: sm8250-xiaomi-pipa: Add initial device tree 
Initial support for Xiaomi Pad 6 tablet, that have sm8250 soc.

Signed-off-by: Luka Panio <lukapanio@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125220315.118922-2-lukapanio@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:55:25 -08:00
Luka Panio
25bb226508 dt-bindings: arm: qcom: Add Xiaomi Pad 6 (xiaomi-pipa) 
Add a compatible for Xiaomi Pad 6.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Luka Panio <lukapanio@gmail.com>
Link: https://lore.kernel.org/r/20231125220315.118922-1-lukapanio@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:55:25 -08:00
Alex Elder
33eae059cc arm64: dts: qcom: sm8550-qrd: enable IPA 
Enable IPA on the SM8550 QRD.  The GSI firmware on this platform is
loaded by the AP.

Signed-off-by: Alex Elder <elder@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Link: https://lore.kernel.org/r/20231124181718.915208-3-elder@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:54:27 -08:00
Alex Elder
32c5a8b93b arm64: dts: qcom: sm8550: add IPA information 
Add IPA-related nodes and definitions to "sm8550.dtsi", which uses
IPA v5.5.

Signed-off-by: Alex Elder <elder@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Link: https://lore.kernel.org/r/20231124181718.915208-2-elder@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:54:27 -08:00
Sibi Sankar
ef9284a55a dt-bindings: arm: qcom-soc: extend pattern matching for X1E80100 SoC 
Extend pattern matching to support the X1E platform name.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124100608.29964-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:50:59 -08:00
Krzysztof Kozlowski
dd744d7d15 arm64: dts: qcom: minor whitespace cleanup around '=' 
The DTS code coding style expects exactly one space before and after '='
sign.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231124095049.58618-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:50:38 -08:00
Robert Marko
6a25e70214 arm64: dts: qcom: ipq8074: Add QUP4 SPI node 
Add node to support the QUP4 SPI controller inside of IPQ8074.
Some devices use this bus to communicate to a Bluetooth controller.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/20231123121324.1046164-1-robimarko@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:49:58 -08:00
Imran Shaik
66ec7b4f47 arm64: dts: qcom: qdu1000: Add ECPRI clock controller 
Add device node for ECPRI clock controller on qcom QDU1000
and QRU1000 SoCs.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231123064735.2979802-5-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:47:26 -08:00
Johan Hovold
29d91ecf53 arm64: dts: qcom: sm8550: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Note that only triggering on rising edges can be used to detect resume
events but not disconnect events.

Fixes: 7f7e5c1b03 ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Cc: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20231120164331.8116-12-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:24 -08:00
Johan Hovold
54524b6987 arm64: dts: qcom: sm8150: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Fixes: 0c9dde0d20 ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes")
Fixes: b33d2868e8 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes")
Cc: stable@vger.kernel.org      # 5.10
Cc: Jonathan Marek <jonathan@marek.ca>
Cc: Jack Pham <quic_jackp@quicinc.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Jack Pham <quic_jackp@quicinc.com>
Link: https://lore.kernel.org/r/20231120164331.8116-11-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:24 -08:00
Johan Hovold
41952be666 arm64: dts: qcom: sm6375: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Fixes: 59d34ca97f ("arm64: dts: qcom: Add initial device tree for SM6375")
Cc: stable@vger.kernel.org      # 6.2
Cc: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20231120164331.8116-10-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:24 -08:00
Johan Hovold
84ad9ac8d9 arm64: dts: qcom: sdm845: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Fixes: ca4db2b538 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
Cc: stable@vger.kernel.org      # 4.20
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20231120164331.8116-9-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:24 -08:00
Johan Hovold
de3b3de309 arm64: dts: qcom: sdm670: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Fixes: 07c8ded6e3 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Cc: stable@vger.kernel.org      # 6.2
Cc: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20231120164331.8116-8-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:24 -08:00
Johan Hovold
0dc0f6da3d arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Fixes: b080f53a8f ("arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes")
Cc: stable@vger.kernel.org      # 6.5
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20231120164331.8116-7-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:24 -08:00
Johan Hovold
24f8aba9a7 arm64: dts: qcom: sc7280: fix usb_2 wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Note that only triggering on rising edges can be used to detect resume
events but not disconnect events.

Fixes: bb9efa59c6 ("arm64: dts: qcom: sc7280: Add USB related nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20231120164331.8116-6-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:23 -08:00
Johan Hovold
c34199d967 arm64: dts: qcom: sc7280: fix usb_1 wakeup interrupt types 
A recent cleanup reordering the usb_1 wakeup interrupts inadvertently
switched the DP and SuperSpeed interrupt trigger types.

Fixes: 4a7ffc10d1 ("arm64: dts: qcom: align DWC3 USB interrupts with DT schema")
Cc: stable@vger.kernel.org      # 5.19
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231120164331.8116-5-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:23 -08:00
Johan Hovold
9b956999bf arm64: dts: qcom: sc7180: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Cc: stable@vger.kernel.org      # 5.10
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20231120164331.8116-4-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:23 -08:00
Johan Hovold
0984bc0165 arm64: dts: qcom: sa8775p: fix USB wakeup interrupt types 
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Note that only triggering on rising edges can be used to detect resume
events but not disconnect events.

Fixes: de1001525c ("arm64: dts: qcom: sa8775p: add USB nodes")
Cc: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20231120164331.8116-3-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:40:23 -08:00
Nikita Travkin
12fbe58560 arm64: dts: qcom: msm8916-longcheer-l8150: Add battery and charger 
Longcheer L8150 doesn't have any dedicated fuel-gauge or charger,
instead making use of the pmic hardware blocks for those purposes.

Add pm8916 bms and charger, as well as the battery cell description
that those blocks rely on.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Link: https://lore.kernel.org/r/20231120-pm8916-dtsi-bms-lbc-v4-3-4f91056c8252@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:38:40 -08:00
Nikita Travkin
26b87a3dc3 arm64: dts: qcom: pm8916: Add BMS and charger 
pm8916 contains some hardware blocks for battery powered devices:

- VM-BMS: Battery voltage monitoring block.
- LBC: Linear battery charger.

Add them to the pmic dtsi so the devices that make use of those blocks
can enable them.

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231120-pm8916-dtsi-bms-lbc-v4-2-4f91056c8252@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:38:40 -08:00
Konrad Dybcio
6a7f8c635d arm64: dts: qcom: sc7280: Add 0xac Adreno speed bin 
A643 (A635 speedbin 0xac) tops out at 812 MHz. Fill in the
opp-supported-hw appropriately.

Note that fuseval 0xac is referred to as speedbin 1 downstream, but
that was already in use upstream, so 2 was chosen instead.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230926-topic-a643-v2-4-06fa3d899c0a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:37:45 -08:00
Konrad Dybcio
31edad4785 arm64: dts: qcom: sc7280: Mark Adreno SMMU as DMA coherent 
The SMMUs on sc7280 are cache-coherent. APPS_SMMU is marked as such,
mark the GPU one as well.

Fixes: 96c471970b ("arm64: dts: qcom: sc7280: Add gpu support")
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230926-topic-a643-v2-3-06fa3d899c0a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:37:45 -08:00
Konrad Dybcio
94085049fd arm64: dts: qcom: sc7280: Fix up GPU SIDs 
GPU_SMMU SID 1 is meant for Adreno LPAC (Low Priority Async Compute).
On platforms that support it (in firmware), it is necessary to
describe that link, or Adreno register access will hang the board.

The current settings are functionally identical, *but* due to what is
likely hardcoded security policies, the secure firmware rejects them,
resulting in the board hanging. To avoid that, alter the settings such
that SID 0 and 1 are described separately.

Fixes: 96c471970b ("arm64: dts: qcom: sc7280: Add gpu support")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230926-topic-a643-v2-2-06fa3d899c0a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:37:45 -08:00
Konrad Dybcio
0ab1bef0b7 arm64: dts: qcom: sc7280: Add ZAP shader support 
Non-Chrome SC7280-family platforms ship a ZAP shader with the Adreno GPU.
Describe that and make sure it doesn't interfere with Chrome devices.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230926-topic-a643-v2-1-06fa3d899c0a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:37:45 -08:00
Krzysztof Kozlowski
08105d9a54 dt-bindings: arm: qcom-soc: extend pattern for matching existing SoCs 
Add missing QDU, QRU and SDA platform names to the pattern matching all
Qualcomm compatibles.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231120100617.47156-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:35:37 -08:00
Rohit Agarwal
a8db1c061f arm64: dts: qcom: sdx75-idp: Enable USB3 and PHY support 
Enable the support for USB3 controller, QMP PHY and HS PHY
on SDX75 IDP.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231117080737.606687-4-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:32:10 -08:00
Rohit Agarwal
f47303a8d0 arm64: dts: qcom: Add USB3 and PHY support on SDX75 
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
HS PHY on SDX75.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231117080737.606687-3-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-12-07 08:32:10 -08:00