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arm64: dts: qcom: sm8650: add LPASS LPI pin controller

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Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin
controller device node as part of audio subsystem in Qualcomm SM8650
SoC.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231204155746.302323-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
2023-12-04 16:57:43 +01:00
committed by Bjorn Andersson
parent ff28260e3d
commit 2d6bc13321
1 changed files with 14 additions and 0 deletions
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14
arch/arm64/boot/dts/qcom/sm8650.dtsi
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@@ -21,6 +21,7 @@
#include <dt-bindings/reset/qcom,sm8650-gpucc.h>
#include <dt-bindings/soc/qcom,gpr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -2649,6 +2650,19 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
};
};
lpass_tlmm: pinctrl@6e80000 {
compatible = "qcom,sm8650-lpass-lpi-pinctrl";
reg = <0 0x06e80000 0 0x20000>;
clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "core", "audio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 23>;
};
lpass_lpiaon_noc: interconnect@7400000 {
compatible = "qcom,sm8650-lpass-lpiaon-noc";
reg = <0 0x07400000 0 0x19080>;