mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-05 19:24:01 -04:00
Code Issues Packages Projects Releases Wiki Activity
1,136,233 Commits 1 Branch 929 Tags
5440c005dadc22ee132d59816ca51eb98aa59954
Commit Graph

1136233 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Konrad Dybcio
5440c005da arm64: dts: qcom: sm8350-sagami: Add most RPMh regulators 
Configure most RPMh-controlled regulators on SoMC Sagami. The missing
ones (on pm8350b and pm8008[ij]) will be configured when driver support
is added. Thankfully, it looks like PDX215 and PDX214 don't have any
differences when it comes to PM8350/PM8350C/PMR735a.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221114143642.44839-1-konrad.dybcio@linaro.org
 2022-11-15 11:45:51 -06:00
Douglas Anderson
f98d1a3c65 arm64: dts: qcom: sc7280: Make herobrine-audio-rt5682 mic dtsi's match more 
The 1-mic and 3-mic dtsi still had two minor cosmetic differences
after commit '3d11e7e120ee ("arm64: dts: qcom: sc7280: sort out the
"Status" to last property with
sc7280-herobrine-audio-rt5682.dtsi")'. Let's fix them so the two files
diff better. This is expected to have no effect though it will
slightly change the generated dtb by removing an unnecessary 'status =
"okay"' from the sound node.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221114162807.1.I0900b97128f9bb03e5f96fcb3068c227a33f143a@changeid
 2022-11-15 11:45:09 -06:00
Krzysztof Kozlowski
22dbcfd6f4 arm64: dts: qcom: trim addresses to 8 digits 
Hex numbers in addresses and sizes should be rather eight digits, not
nine.  Drop leading zeros.  No functional change (same DTB).

Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115105046.95254-1-krzysztof.kozlowski@linaro.org
 2022-11-15 10:53:20 -06:00
Krzysztof Kozlowski
b132731bb9 arm64: dts: msm8998: unify PCIe clock order withMSM8996 
PCIe on MSM8996 and MSM8998 use the same clocks, so use one order to
make the binding simpler.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115125310.184012-4-krzysztof.kozlowski@linaro.org
 2022-11-15 10:51:22 -06:00
Krzysztof Kozlowski
0d70d5f661 arm64: dts: msm8998: add MSM8998 specific compatible 
Add new compatible for MSM8998 (compatible with MSM8996) to allow
further customizing if needed and to accurately describe the hardware.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115125310.184012-3-krzysztof.kozlowski@linaro.org
 2022-11-15 10:51:22 -06:00
Johan Hovold
123b30a756 arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller 
Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to
PCIe4.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-10-johan+linaro@kernel.org
 2022-11-11 21:35:45 -06:00
Johan Hovold
176d54acd5 arm64: dts: qcom: sc8280xp-x13s: enable modem 
Enable the modem connected to the PCIe3a M.2 connector.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-9-johan+linaro@kernel.org
 2022-11-11 21:35:45 -06:00
Johan Hovold
b4bb952e6c arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD 
Enable the NVMe SSD connected to PCIe2.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-8-johan+linaro@kernel.org
 2022-11-11 21:35:45 -06:00
Johan Hovold
d907fe5acb arm64: dts: qcom: sc8280xp-crd: enable WiFi controller 
Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to
PCIe4.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-7-johan+linaro@kernel.org
 2022-11-11 21:35:25 -06:00
Johan Hovold
17e2ccaf65 arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem 
Enable the SDX55 modem connected to PCIe3.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-6-johan+linaro@kernel.org
 2022-11-11 21:35:25 -06:00
Johan Hovold
6a1ec5eca7 arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD 
Enable the NVMe SSD connected to PCIe2.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-5-johan+linaro@kernel.org
 2022-11-11 21:35:25 -06:00
Johan Hovold
5634c6d977 arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators 
Rename the backlight and misc regulators according to the net names.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-4-johan+linaro@kernel.org
 2022-11-11 21:35:25 -06:00
Johan Hovold
c35d4d7128 arm64: dts: qcom: sa8295p-adp: enable PCIe 
The SA8295P-ADP has up to four PCIe interfaces implemented by three or
four controllers: PCIe2A, PCIe3A/PCIe3B and PCIe4.

PCIe2 is used in x4 mode, while PCIe3 can be used in either x2 or x4
mode. Enable both PCIe3A and PCI3B in x2 mode for now.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-3-johan+linaro@kernel.org
 2022-11-11 21:35:25 -06:00
Johan Hovold
813e831570 arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes 
The SC8280XP platform has seven PCIe controllers:

	PCIe0	USB4
	PCIe1	USB4
	PCIe2A	4-lane
	PCIe2B	2-lane
	PCIe3A	4-lane
	PCIe3B	2-lane
	PCIe4	1-lane

while SA8540P only has five (PCIe2-4).

Add devicetree nodes for the PCIe2-4 controllers and their PHYs.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-2-johan+linaro@kernel.org
 2022-11-11 21:35:24 -06:00
Richard Acayan
07c8ded6e3 arm64: dts: qcom: add sdm670 and pixel 3a device trees 
The Qualcomm Snapdragon 670 has been out for a while. Add a device tree
for it and the Google Pixel 3a as the first device.

The Pixel 3a has the same bootloader issue as the Pixel 3 and will not work
on Android 10 bootloaders or later until it gets fixed for the Pixel 3.

SoC Initial Features:
 - power management
 - clocks
 - pinctrl
 - eMMC
 - USB 2.0
 - GENI I2C
 - IOMMU
 - RPMh
 - interrupts

Device-Specific Initial Features:
 - side buttons (keys)
 - regulators
 - touchscreen

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111001818.124901-5-mailingradian@gmail.com
 2022-11-11 21:29:02 -06:00
Sibi Sankar
87548e54b8 arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragment 
The Google Herobrine WIFI SKU can save 256M by not having modem/mba/rmtfs
memory regions defined. Add the dts fragment and mark all the board files
appropriately.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110070813.1777-2-quic_sibis@quicinc.com
 2022-11-11 14:30:17 -06:00
Sibi Sankar
3c800bcf07 arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTE 
When the modem node was re-located to a separate LTE source file
"sc7280-herobrine-lte-sku.dtsi", some of the previous LTE users
weren't marked appropriately. Fix this by marking all Qualcomm
reference devices as LTE.

Suggested-by: Douglas Anderson <dianders@chromium.org>
Fixes: d42fae738f ("arm64: dts: qcom: Add LTE SKUs for sc7280-villager family")
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110070813.1777-1-quic_sibis@quicinc.com
 2022-11-11 14:30:17 -06:00
Luca Weiss
94262a18d7 arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card 
Fairphone 4 uses sdhc_2 for the SD card, configure the pins for it and
enable it.

The regulators which are exclusively used for SDHCI have their maximum
voltage decreased to what downstream sets on the consumer side, like on
many other platforms and allowed to set the load.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110151507.53650-1-luca.weiss@fairphone.com
 2022-11-11 14:29:57 -06:00
Krzysztof Kozlowski
b69e4bb48a arm64: dts: qcom: sm8450: drop incorrect spi-max-frequency 
spi-max-frequency is a property of SPI device, not the controller:

  qcom/sm8450-hdk.dtb: geniqup@8c0000: spi@880000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110152741.542024-1-krzysztof.kozlowski@linaro.org
 2022-11-11 14:29:33 -06:00
Bjorn Andersson
a607fe5ea2 arm64: dts: qcom: sc8280xp-x13s: Add LID switch 
Add gpio-keys for exposing the LID switch state.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220730193617.1688563-1-bjorn.andersson@linaro.org
 2022-11-09 22:17:55 -06:00
Krzysztof Kozlowski
1c3c31a6e7 arm64: dts: qcom: ipq8074: align TLMM pin configuration with DT schema 
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221108142357.67202-2-krzysztof.kozlowski@linaro.org
 2022-11-09 21:27:50 -06:00
Srinivasa Rao Mandadapu
7804303128 arm64: dts: qcom: sc7280: Remove redundant soundwire property 
Remove redundant and undocumented property qcom,port-offset in
soundwire controller nodes.
This patch is required to avoid dtbs_check errors with
qcom,soundwire.yaml

Fixes: 12ef689f09 ("arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs")
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1667918763-32445-4-git-send-email-quic_srivasam@quicinc.com
 2022-11-09 21:25:52 -06:00
Srinivasa Rao Mandadapu
837f597ebc arm64: dts: qcom: sm8250: Remove redundant soundwire property 
Remove redundant and undocumented property qcom,port-offset in
soundwire controller nodes.
This patch is required to avoid dtbs_check errors with
qcom,soundwire.yaml

Fixes: 24f52ef0c4 ("arm64: dts: qcom: sm8250: Add nodes for tx and rx macros with soundwire masters")
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1667918763-32445-3-git-send-email-quic_srivasam@quicinc.com
 2022-11-09 21:25:52 -06:00
Srinivasa Rao Mandadapu
bd35f4b017 arm64: dts: qcom: Update soundwire secondary node names 
Update soundwire secondary nodes of WSA speaker to match with
dt-bindings pattern properties regular expression.

This modification is required to avoid dtbs-check errors
occurred with qcom,soundwire.yaml.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1667918763-32445-2-git-send-email-quic_srivasam@quicinc.com
 2022-11-09 21:25:52 -06:00
Alex Elder
d4d4a7c4fd arm64: dts: qcom: sc7280-idp: don't modify &ipa twice 
In "sc7280-idp.dts", the IPA node is modified after being defined.
However that file includes "sc7280-idp.dtsi", which also modifies
the IPA node (in the same way).  This only needs to be done in
"sc7280-idp.dtsi".

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221108201625.1220919-1-elder@linaro.org
 2022-11-09 21:23:42 -06:00
Maulik Shah
2ffa0ca4d3 arm64: dts: qcom: Add power-domains property for apps_rsc 
Add power-domains property which allows apps_rsc device to attach
to cluster power domain on sm8150, sm8250, sm8350 and sm8450.

Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # SM8450
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018152837.619426-4-ulf.hansson@linaro.org
 2022-11-09 21:14:37 -06:00
Dmitry Baryshkov
d6e636787d arm64: dts: qcom: msm8996: change order of SMMU clocks on this platform 
Change order of SMMU clocks to match the schema.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102184420.534094-2-dmitry.baryshkov@linaro.org
 2022-11-07 22:23:05 -06:00
Job Noorman
6d9a666d49 arm64: dts: qcom: sdm632: fairphone-fp3: add touchscreen 
Add Himax hx83112b touchscreen to the FP3 DT.

Signed-off-by: Job Noorman <job@noorman.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107105604.26541-4-job@noorman.info
 2022-11-07 22:06:26 -06:00
Konrad Dybcio
4420e60416 arm64: dts: qcom: Add device tree for Sony Xperia 10 IV 
Add support for Sony Xperia 10 IV, a.k.a PDX225. This device is a part
of the SoMC SM6375 Murray platform and currently it is the only
device based on that board, so no -common DTSI is created until (if?)
other Murray devices appear.

This commit brings support for:
* USB (only USB2 for now)
* Display via simplefb

To create a working boot image, you need to run:
cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm6375-sony-xperia-\
murray-pdx225.dtb > .Image.gz-dtb

mkbootimg \
--kernel .Image.gz-dtb \
--ramdisk some_initrd.img \
--pagesize 4096 \
--base 0x0 \
--kernel_offset 0x8000 \
--ramdisk_offset 0x1000000 \
--tags_offset 0x100 \
--cmdline "SOME_CMDLINE" \
--dtb_offset 0x1f00000 \
--header_version 1 \
--os_version 12 \
--os_patch_level 2022-04 \ # or newer
-o boot.img-sony-xperia-pdx225

Then, you need to flash it on the device and get rid of all the
vendor_boot/dtbo mess:

First, you need to get rid of vendor_boot. However, the bootloader
is utterly retarded and it will not let you neither flash nor erase it.
There are a couple ways to handle this: you can either dd /dev/zero to
it from Android (if you have root) or a custom recovery or from fastbootd
(fastboot/adb reboot fastboot). You will not be able to boot Android
images on your phone unless you lock the bootloader (fastboot oem lock)
and restore the factory image with Xperia Companion
Windows-and-macOS-only software.

The best way so far is probably to use the second (_b) slot and flash
mainline there. This will however require you to flash some partitions
manually, as they are not populated from factory:

(boot_b, dtbo_b, vendor_boot_b, vbmeta_b, vbmeta_system_b) - these we
don't really care about as we nuke/replace them

(dsp_b, imagefv_b, modem_b, oem_b, rdimage_b) - these you NEED to populate
to get a successful boot on slot B, otherwise you will have limited / no
functionality.

To switch slots, simply run:

fastboot --set-active=a //or =b

The rest assumes you are on slot A.

// You have to either pull vbmeta{"","_system"} from
// /dev/block/bootdevice/by-name/ or build one as a part of AOSP
fastboot --disable-verity --disable-verification flash vbmeta_b vbmeta.img
fastboot --disable-verity --disable-verification flash vbmeta_system_b \
vbmeta_system.img

fastboot flash boot_b boot.img-sony-xperia-pdx225
fastboot reboot fastboot // entering fastbootd
fastboot flash vendor_boot_b emptything.img
fastboot flash dtbo_b emptything.img
fastboot reboot bootloader // entering bootloader fastboot
fastboot --set-active=b
fastboot reboot // mainline time!

Where emptything.img is a tiny file that consists of 2 bytes (all zeroes),
doing a "fastboot erase" won't cut it, the bootloader will go crazy and
things will fall apart when it tries to overlay random bytes from an empty
partition onto a perfectly good appended DTB.

From there on you can flash new mainline builds by simply flashing
boot.img that you create after each kernel rebuild.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107120920.12593-4-konrad.dybcio@linaro.org
 2022-11-07 22:04:31 -06:00
Konrad Dybcio
59d34ca97f arm64: dts: qcom: Add initial device tree for SM6375 
Add an initial device tree for the SM6375 (SD695) SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107120920.12593-3-konrad.dybcio@linaro.org
 2022-11-07 22:04:31 -06:00
Konrad Dybcio
7c1b74e079 dt-bindings: arm: cpus: Add Kryo 660 CPUs 
Add a compatible for Kryo 660 CPUs found in at least Qualcomm SM6375.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107120920.12593-1-konrad.dybcio@linaro.org
 2022-11-07 22:03:01 -06:00
Stephen Boyd
9ec68fea9e arm64: dts: qcom: sc7180: Fully describe fingerprint node on Trogdor 
Update the fingerprint node on Trogdor to match the fingerprint DT
binding. This will allow us to drive the reset and boot gpios from the
driver when it is re-attached after flashing. We'll also be able to boot
the fingerprint processor if the BIOS isn't doing it for us.

Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107191535.624371-3-swboyd@chromium.org
 2022-11-07 21:53:13 -06:00
Stephen Boyd
aefd5370ab arm64: dts: qcom: sc7280: Fully describe fingerprint node on Herobrine 
Update the fingerprint node on Herobrine to match the fingerprint DT
binding. This will allow us to drive the reset and boot gpios from the
driver when it is re-attached after flashing. We'll also be able to boot
the fingerprint processor if the BIOS isn't doing it for us.

Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107191535.624371-2-swboyd@chromium.org
 2022-11-07 21:53:06 -06:00
Marijn Suijten
f53152d1d4 arm64: dts: qcom: sm6125: Enable Command Queue Engine (CQE) for SDHCI 1 
Downstream sources confirm sm6125 supports CQE, and after fixing the
reg name for this range [1] this feature probes and enables correctly:

    [    0.391950] sdhci_msm 4744000.mmc: mmc0: CQE init: success

[1]: https://lore.kernel.org/all/20221026163646.37433-1-krzysztof.kozlowski@linaro.org/

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107214702.311271-1-marijn.suijten@somainline.org
 2022-11-07 19:33:39 -06:00
Krzysztof Kozlowski
3de1172624 arm64: dts: qcom: sm6125: fix SDHCI CQE reg names 
SM6125 comes with SDCC (SDHCI controller) v5, so the second range of
registers is cqhci, not core.

Fixes: cff4bbaf2a ("arm64: dts: qcom: Add support for SM6125")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Sony Xperia 10 II
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026163646.37433-1-krzysztof.kozlowski@linaro.org
 2022-11-07 19:33:31 -06:00
Luca Weiss
4ab3acd637 arm64: dts: qcom: pm8998: adjust coincell node name to bindings 
The spmi-pmic bindings say that pm8941-coincell should be called
'charger'.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221031175119.939860-3-luca@z3ntu.xyz
 2022-11-07 19:26:38 -06:00
Konrad Dybcio
5d9bf21088 arm64: dts: qcom: pm6150/l/pm7325/pms405: Fix up comments 
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-12-konrad.dybcio@linaro.org
 2022-11-07 19:26:38 -06:00
Konrad Dybcio
3e3a2be790 arm64: dts: qcom: qcs404-*: Fix up comments 
Switch '//' comments to C-style /* */.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-11-konrad.dybcio@linaro.org
 2022-11-07 19:26:38 -06:00
Konrad Dybcio
79b185d055 arm64: dts: qcom: msm8994-*: Fix up comments 
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-10-konrad.dybcio@linaro.org
 2022-11-07 19:26:38 -06:00
Konrad Dybcio
290d43062d arm64: dts: qcom: msm8992-*: Fix up comments 
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.

Also, trim off downstream regulator properties from comments to prevent
them from accidentally landing into mainline one day..

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-9-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Konrad Dybcio
d5d8e59f35 arm64: dts: qcom: ipq8074-*: Fix up comments 
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.

Also, fix up some whitespace within comments.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-8-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Konrad Dybcio
108162894a arm64: dts: qcom: sdm845-*: Fix up comments 
Switch '//' comments to C-style /* */.
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-7-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Konrad Dybcio
b47fac7ab9 arm64: dts: qcom: sc8280xp-x13s: Fix up comments 
Switch '//' comments to C-style /* */.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-6-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Konrad Dybcio
689469ea4c arm64: dts: qcom: msm8998-*: Fix up comments 
Switch '//' comments to C-style /* */ and fix up the contents of some.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-5-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Konrad Dybcio
83e8692144 arm64: dts: qcom: msm8953: Fix up comments 
Switch '//' comments to C-style /* */ and fix up the contents of some.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-4-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Konrad Dybcio
bd95b48a59 arm64: dts: qcom: msm/apq8x96-*: Fix up comments 
Switch '//' comments to C-style /* */ and fix up the contents of some.
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Also, fix up a single raw '2' to PM8994_GPIO_S4 while at it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-3-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Konrad Dybcio
4bb376f6cc arm64: dts: qcom: msm/apq8x16-*: Fix up comments 
Switch '//' comments to C-style /* */ and fix up the contents of some.
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-2-konrad.dybcio@linaro.org
 2022-11-07 19:26:37 -06:00
Krzysztof Kozlowski
a979f2e5d5 arm64: dts: qcom: qcs404: align TLMM pin configuration with DT schema 
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104161131.57719-1-krzysztof.kozlowski@linaro.org
 2022-11-07 19:26:37 -06:00
Robert Marko
1bc6b7f26b arm64: dts: qcom: hk01: use GPIO flags for tlmm 
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of
harcoding the cell value.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107092930.33325-3-robimarko@gmail.com
 2022-11-07 19:26:37 -06:00
Robert Marko
3f49bdaf6f arm64: dts: qcom: hk10: use GPIO flags for tlmm 
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of
harcoding the cell value.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107092930.33325-2-robimarko@gmail.com
 2022-11-07 19:26:37 -06:00