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arm64: dts: qcom: msm8996: change order of SMMU clocks on this platform

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Change order of SMMU clocks to match the schema.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102184420.534094-2-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov
2022-11-02 21:44:10 +03:00
committed by Bjorn Andersson
parent 6d9a666d49
commit d6e636787d
1 changed files with 15 additions and 16 deletions
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31
arch/arm64/boot/dts/qcom/msm8996.dtsi
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@@ -2234,9 +2234,9 @@ adreno_smmu: iommu@b40000 {
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
clocks = <&mmcc GPU_AHB_CLK>,
<&gcc GCC_MMSS_BIMC_GFX_CLK>;
clock-names = "iface", "bus";
clocks = <&gcc GCC_MMSS_BIMC_GFX_CLK>,
<&mmcc GPU_AHB_CLK>;
clock-names = "bus", "iface";
power-domains = <&mmcc GPU_GDSC>;
};
@@ -2301,9 +2301,9 @@ mdp_smmu: iommu@d00000 {
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
clocks = <&mmcc SMMU_MDP_AHB_CLK>,
<&mmcc SMMU_MDP_AXI_CLK>;
clock-names = "iface", "bus";
clocks = <&mmcc SMMU_MDP_AXI_CLK>,
<&mmcc SMMU_MDP_AHB_CLK>;
clock-names = "bus", "iface";
power-domains = <&mmcc MDSS_GDSC>;
};
@@ -2321,9 +2321,9 @@ venus_smmu: iommu@d40000 {
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&mmcc MMAGIC_VIDEO_GDSC>;
clocks = <&mmcc SMMU_VIDEO_AHB_CLK>,
<&mmcc SMMU_VIDEO_AXI_CLK>;
clock-names = "iface", "bus";
clocks = <&mmcc SMMU_VIDEO_AXI_CLK>,
<&mmcc SMMU_VIDEO_AHB_CLK>;
clock-names = "bus", "iface";
#iommu-cells = <1>;
status = "okay";
};
@@ -2337,10 +2337,9 @@ vfe_smmu: iommu@da0000 {
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&mmcc MMAGIC_CAMSS_GDSC>;
clocks = <&mmcc SMMU_VFE_AHB_CLK>,
<&mmcc SMMU_VFE_AXI_CLK>;
clock-names = "iface",
"bus";
clocks = <&mmcc SMMU_VFE_AXI_CLK>,
<&mmcc SMMU_VFE_AHB_CLK>;
clock-names = "bus", "iface";
#iommu-cells = <1>;
};
@@ -2365,9 +2364,9 @@ lpass_q6_smmu: iommu@1600000 {
<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>,
<&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>;
clock-names = "iface", "bus";
clocks = <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>,
<&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>;
clock-names = "bus", "iface";
};
slpi_pil: remoteproc@1c00000 {