ASPEED device tree updates for 5.10
- New machines
* Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
* Facebook Wedge400, an AST2500 BMC system which we can assume is 4
times better than the existing Wedge100 top of rack network switch
- Add a new device, the IBM Operation Panel
- Fixes for Facebook's collection of BMCs
- eMMC and vuart fixes
* tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Mowgli BMC platform
ARM: dts: rainier: Disable internal pull-downs on eMMC pins
ARM: aspeed: g5: Do not set sirq polarity
ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
ARM: dts: aspeed: rainier: Enable XDMA engine
ARM: dts: aspeed: wedge40: Update UART4 pin settings
ARM: dts: aspeed: wedge40: Update FMC flash0 label
ARM: dts: aspeed: Add Facebook Wedge400 BMC
ARM: dts: aspeed: minipack: Update 64MB FMC flash layout
ARM: dts: aspeed: yamp: Set 32MB FMC flash layout
ARM: dts: aspeed: cmm: Set 32MB FMC flash layout
ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi
Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
ARMv8 Juno/Vexpress/Fast Models updates for v5.10
A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.
* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: arm: Fix SP805 clock-names
ARM: dts: arm: Fix SP805 clocks
ARM: dts: arm: Fix SP804 users
Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DTS ARM64 changes for v5.10
Cleanup of Exynos DTS to fix as many dtschema warnings as possible.
This includes adding missing compatibles and using non-deprecated
properties. Changes should not have a visible impact.
* tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add compatibles to sysreg nodes
arm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433
Link: https://lore.kernel.org/r/20200907150425.11077-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DTS ARM changes for v5.10
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
possible. This includes adding missing properties (thus e.g.
enabling S3C RTC clock), correcting existing nodes, renaming of
nodes and using non-deprecated properties or compatibles. Except
mentioned bring up of S3C RTC, this should not have visible
effect.
* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
ARM: dts: exynos: Override thermal by label in Exynos5250
ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5 GIC
ARM: dts: s5pv210: Enable audio on Aries boards
ARM: dts: exynos: Correct whitespace and indentation issues
ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
ARM: dts: exynos: Add CPU cooling in Tiny4412
ARM: dts: exynos: Add CPU cooling in SMDK4412
...
Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Devicetree changes for omaps for v5.10
- Use a known good SGX clockrate for 4430, this is not needed as a fix
as the closed source SGX driver is out of tree
- Prepare DSI panels for upcoming changes to use generic driver code
- Add common support for MOXA UC-8100 series
- Add ocp label for l3 interconnect for board specific dts files to
reference
- Configure CPU thermal properties for omap3
* tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3: Add cpu trips and cooling map for omap34/36 families
ARM: dts: am33xx: add ocp label
ARM: dts: am335x: add common dtsi for MOXA UC-8100 series
ARM: dts: omap4-droid4: add panel orientation
ARM: dts: omap4-droid4: add panel compatible
ARM: dts: omap: add channel to DSI panels
ARM: dts: omap4: Fix sgx clock rate for 4430
ARM: dts: omap5: Fix DSI base address and clocks
ARM: dts: logicpd-som-lv-baseboard: Fix missing video
ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()
Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix dtschema validator warnings like:
gic@fb001000: $nodename:0:
'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
l2-cache-controller@c00000: $nodename:0:
'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Fix dtschema validator warnings like:
l2-cache-controller@20100000: $nodename:0:
'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mans Rullgard <mans@mansr.com>
Fix dtschema validator warnings like:
l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Fix dtschema validator warnings like:
l2-cache@2040000: $nodename:0:
'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
l2-cache-controller@80040000: $nodename:0:
'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Barry Song <baohua@kernel.org>
Node unit address should be the same as first address appearing in "reg"
property. Fixes DTC warning:
arch/arm64/boot/dts/al/alpine-v2.dtsi:116.38-126.5:
Warning (simple_bus_reg): /soc/interrupt-controller@f0100000: simple-bus unit address format error, expected "f0200000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
gic@f0100000: $nodename:0:
'gic@f0100000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
A feature was added to the aspeed vuart driver to configure the vuart
interrupt (sirq) polarity according to the LPC/eSPI strapping register.
Systems that depend on a active low behaviour (sirq_polarity set to 0)
such as OpenPower boxes also use LPC, so this relationship does not
hold. Jeremy confirms that the s2600st which is strapped for eSPI also
does not have this relationship.
The property was added for a Tyan S7106 system which is not supported
in the kernel tree. Should this or other systems wish to use this
feature of the driver they should add it to the machine specific device
tree.
Fixes: c791fc76bc ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jeremy Kerr <jk@ozlabs.org>
Reviewed-by: Jeremy Kerr <jk@ozlabs.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200812112400.2406734-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.
Link: https://lore.kernel.org/r/20200828130602.42203-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.
For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.
Link: https://lore.kernel.org/r/20200828130602.42203-8-andre.przywara@arm.com
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The SP804 DT nodes for Realview, MPS2 and VExpress were not complying
with the binding: it requires either one or three clocks, but does not
allow exactly two clocks.
Simply duplicate the first clock to satisfy the binding requirement.
For MPS2, we triple the clock, and add the clock-names property, as this
is required by the Linux primecell driver.
Try to make the clock-names more consistent on the way.
Link: https://lore.kernel.org/r/20200828142018.43298-3-andre.przywara@arm.com
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The SATA PHY in Exynos5250 SoCs has two interfaces and two device nodes:
1. sata-phy@12170000
2. i2c-9/i2c@38
The first node represents the actual SATA PHY device with phy-cells.
The second represents an additional I2C interface, needed by the driver
to communicate with the SATA PHY device. It is not a PHY-provider in
the terms of dtschema so rename it to silence dtbs_check warning:
arch/arm/boot/dts/exynos5250-arndale.dt.yaml: sata-phy@38: '#phy-cells' is a required property
From schema: lib/python3.6/site-packages/dtschema/schemas/phy/phy-provider.yaml
This second device node is also a property of SoC, not a board so move
it there.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200902155733.20271-2-krzk@kernel.org
The purpose of those assigned-clock-* properties is to configure clock for
for the I2S device so move them to respective node.
This suppresses the dtbs_check warning:
arch/arm/boot/dts/exynos5422-odroidxu3.dt.yaml: sound: 'clocks' is a dependency of 'assigned-clocks'
Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Use the 32 kHz clock from S2MPS11 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clocks: [[2, 317]] is too short
arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-14-krzk@kernel.org
The pin configuration of Display Port HPD GPIO emds with '-gpio' which
confuses dtschema:
arch/arm/boot/dts/exynos5250-spring.dt.yaml: pinctrl@11400000: dp-hpd-gpio:
{'samsung,pins': ['gpc3-0'], ... 'samsung,pin-drv': [[0]], 'phandle': [[23]]} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-11-krzk@kernel.org
Use the 32 kHz clock from S5M8767 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-10-krzk@kernel.org
Add clock-cells to max77686 PMIC node so its 32 kHz clocks could be used
later in the S3C RTC node. Except making the S3C RTC working, this also
fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-9-krzk@kernel.org
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-8-krzk@kernel.org
The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:
arch/arm/boot/dts/exynos5250-arndale.dt.yaml: soc: i2c-gpio:
{'pinctrl-names': ['default'], ... 'phandle': [[65]]} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
Add a '-10' (there are already 0-9 I2C controllers on the SoC) suffix to
silence it. This pattern on naming i2c-gpio is already present in many
other dts. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-6-krzk@kernel.org
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock. This fixes S3C RTC
and silences dtbs_check warnings like:
arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clocks: [[5, 317]] is too short
arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-5-krzk@kernel.org
The Exynos5260 GIC node does not have any children so remove the address
and size cells as they are not needed by DT bindings. The size-cells of
'0' were also incorrect. This fixes dtbs_check warning:
arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000: #size-cells:0:0: 1 was expected
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-4-krzk@kernel.org
Exynos5260 SoCs have ARM GIC 400. Correct the compatibles to match
dtschema and fix the dtbs_check warnings like:
arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000:
compatible: ['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is not valid under any of the given schemas
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-3-krzk@kernel.org
Exynos5250 and Exynso54xx SoCs have ARM GIC 400. Correct the
compatibles to match dtschema and fix the dtbs_check warnings like:
arch/arm/boot/dts/exynos5420-peach-pit.dt.yaml: interrupt-controller@10481000:
compatible: ['arm,gic-400', 'arm,cortex-a15-gic', 'arm,cortex-a9-gic']
is not valid under any of the given schemas
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-2-krzk@kernel.org
Both the Galaxy S and the Fascinate4G have a WM8994 codec, but they
differ slightly in their jack detection and micbias configuration.
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock. This fixes S3C RTC and
silences dtbs_check warnings like:
arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-32-krzk@kernel.org
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock and silence dtbs_check
warnings like:
arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-31-krzk@kernel.org
