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Tim Huang
38a16bfe6f drm/amdgpu: add SMU IP v14.0.4 discovery support 
This patch is to add SMU 14.0.4 support

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:57 -04:00
Tim Huang
80ffdc273a drm/amd/pm: add SMU IP v14.0.4 support 
This patch is to add SMU 14.0.4 support.

Signed-off-by: Li Ma <li.ma@amd.com>
Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:51 -04:00
Li Ma
11382d02fb drm/amd/pm: smu v14.0.4 reuse smu v14.0.0 dpmtable 
Replace IP VERSION with smu->is_apu in if condition.
And the dpmtable of smu v14.0.4 is same as smu v14.0.0.

Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:45 -04:00
Tim Huang
9cd2ad14d8 drm/amdgpu: add PSP IP v14.0.4 discovery support 
This patch is to add PSP 14.0.4 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:36 -04:00
Tim Huang
c7c3f786b9 drm/amdgpu: add PSP IP v14.0.4 support 
This patch is to add PSP 14.0.4 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:30 -04:00
Tim Huang
614a9f5ed5 drm/amdgpu: add firmware for VPE IP v6.1.3 
This patch is to add firmware for VPE 6.1.3.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:24 -04:00
Tim Huang
ca15cd559f drm/amdgpu: add VPE IP v6.1.3 discovery support 
This patch is to add VPE 6.1.3 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:19 -04:00
Tim Huang
f3e2a425c6 drm/amdgpu: add VPE IP v6.1.3 support 
This patch is to add VPE 6.1.3 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:13 -04:00
Tim Huang
410bb279a8 drm/amdgpu: Add NBIO IP v7.11.3 support 
Enable setting soc21 common clockgating for NBIO 7.11.3.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:06 -04:00
Tim Huang
5aea871694 drm/amdgpu: add NBIO IP v7.11.3 discovery support 
This patch is to add NBIO 7.11.3 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:06:00 -04:00
Tim Huang
6857669a22 drm/amdgpu: add firmware for SDMA IP v6.1.2 
This patch is to add firmware for SDMA 6.1.2.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:53 -04:00
Tim Huang
71d8af38d3 drm/amdkfd: add KFD support for SDMA IP v6.1.2 
Enable KFD setting SDMA info for SDMA 6.1.2.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:47 -04:00
Tim Huang
dfeccf4d54 drm/amdgpu: add SDMA IP v6.1.2 discovery support 
This patch is to add SDMA 6.1.2 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:41 -04:00
Tim Huang
4448b1ff4d drm/amdgpu: add firmware for GC IP v11.5.2 
This patch is to add firmware for GC 11.5.2.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:35 -04:00
Tim Huang
53c3a37436 drm/amdkfd: add KFD support for GC IP v11.5.2 
Enable KFD for GC 11.5.2.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:29 -04:00
Tim Huang
23c1ea0241 drm/amdgpu: add GC IP v11.5.2 to GC 11.5.0 family 
This patch is to add GC 11.5.2 to GC 11.5.0 family.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:23 -04:00
Tim Huang
43e4cc2299 drm/amdgpu: add GC IP v11.5.2 soc21 support 
Add CG and PG flags for GFX IP v11.5.2 and
PG flags for VCN IP v4.0.5.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Signed-off-by: Li Ma <li.ma@amd.com>
Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:15 -04:00
Tim Huang
98392782df drm/amdgpu: add tmz support for GC IP v11.5.2 
Add tmz support for GC 11.5.2.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:09 -04:00
Tim Huang
02cf3ed627 drm/amdgpu: add GFXHUB IP v11.5.2 support 
This patch is to add GFXHUB 11.5.2 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:05:03 -04:00
Tim Huang
b6a343df46 drm/amdgpu: initialize GC IP v11.5.2 
Initialize GC 11.5.2 and set gfx hw configuration.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:04:57 -04:00
Sunil Khatri
425c4a6f8b drm/amdgpu: fix out of bounds access in gfx10 during ip dump 
During ip dump in gfx10 the index variable is reused but is
not reinitialized to 0 and this causes the index calculation
to be wrong and access out of bound access.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:04:49 -04:00
Jiapeng Chong
e931ab3eea drm/amd/display: Fix warning comparing pointer to 0 
Avoid pointer type value compared with 0 to make code clear.

./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_factory.c:14:12-13: WARNING comparing pointer to 0.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:04:47 -04:00
Jiapeng Chong
f4b1dbf413 drm/amd/display: Fix warning comparing pointer to 0 
Avoid pointer type value compared with 0 to make code clear.

./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_factory.c:24:12-13: WARNING comparing pointer to 0.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:04:45 -04:00
Jiapeng Chong
dcac51bd10 drm/amd/display: Fix warning comparing pointer to 0 
Avoid pointer type value compared with 0 to make code clear.

./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_factory.c:19:12-13: WARNING comparing pointer to 0.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:04:42 -04:00
Jiapeng Chong
5380092f65 drm/amd/display: Fix warning comparing pointer to 0 
Avoid pointer type value compared with 0 to make code clear.

./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_factory.c:31:12-13: WARNING comparing pointer to 0.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:04:36 -04:00
Jiapeng Chong
fcb2f988ef drm/amd/display: Fix unsigned comparison with less than zero 
The return value from the call to dml21_find_dc_pipes_for_plane() is int.
However, the return value is being assigned to an unsigned int variable
'num_pipes', the condition if(num_pipes <= 0) is not rigorous enough,
so making 'num_pipes' an int.

./drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:318:6-15: WARNING: Unsigned expression compared with zero: num_pipes <= 0.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:360:6-15: WARNING: Unsigned expression compared with zero: num_pipes <= 0.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9454
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-02 18:04:27 -04:00
Marek Olšák
f340f2bad1 drm/amdgpu: rewrite convert_tiling_flags_to_modifier_gfx12 
There were multiple bugs, like checking SWIZZLE_MODE before checking
GFX12_SWIZZLE_MODE, which has undefined behavior.

The function had no effect before (it always returned -EINVAL).

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Pierre-Eric Pelloux-Prayer
ca280d2919 drm/radeon: check bo_va->bo is non-NULL before using it 
The call to radeon_vm_clear_freed might clear bo_va->bo, so
we have to check it before dereferencing it.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Lijo Lazar
62ec7d38b7 drm/amdkfd: Use device based logging for errors 
Convert some pr_* to some dev_* APIs to identify the device.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Hawking Zhang
d3dbccacfd drm/amdgpu: Fix hbm stack id in boot error report 
To align with firmware, hbm id field 0x1 refers to
hbm stack 0, 0x2 refers to hbm statck 1.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Marek Olšák
0d3157d04d drm/amdgpu: add amdgpu_framebuffer::gfx12_dcc 
amdgpu_framebuffer doesn't have tiling_flags, so we need this.

amdgpu_display_get_fb_info never gets NULL parameters, so checking for NULL
was useless.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Marek Olšák
cc6e00a6c4 drm/amdgpu/display: add all gfx12 modifiers 
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Marek Olšák
ce7985fd94 drm/amdgpu/display: set plane attributes for gfx12 correctly 
It used gfx9 flags, which has undefined behavior on gfx12.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Marek Olšák
ed17b63e7e drm/amdgpu/display: handle gfx12 in amdgpu_dm_plane_format_mod_supported 
All this code has undefined behavior on GFX12 and shouldn't be executed.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Marek Olšák
8dd1426e2c drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizes 
It verified GFX9-11 swizzle modes on GFX12, which has undefined behavior.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Hawking Zhang
c2fad73174 drm/amdgpu: Correct register used to clear fault status 
Driver should write to fault_cntl registers to do
one-shot address/status clear.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:47 -04:00
Marek Olšák
fd536d2e12 drm/amdgpu: don't use amdgpu_lookup_format_info on gfx12 
It only uses fields for GFX9-11 related to the separate DCC buffer,
which doesn't exist in GFX12.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:46 -04:00
Marek Olšák
f21373802d drm/amdgpu/display: handle gfx12 in dm_check_cursor_fb 
Checking SWIZZLE_MODE has undefined behavior on gfx12.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:46 -04:00
Marek Olšák
8d9ffd15ff drm/amdgpu: remove AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_* definitions 
They were added accidentally.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:46 -04:00
Marek Olšák
30fb9cad6f drm/amdgpu/gfx12: remove GDS leftovers 
GDS doesn't exist in gfx12. The incomplete packet allows userspace to hang
the hw from the kernel.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:46 -04:00
Marek Olšák
e5f6bfe402 drm/amdgpu/gfx12: remove superfluous cache flags 
If any INV flags are needed, they should be executed via ACQUIRE_MEM
before INDIRECT_BUFFER.

GLM flags are also removed because the hw ignores them.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:46 -04:00
Marek Olšák
b16ec6300f drm/amdgpu/gfx11: remove superfluous cache flags 
If any INV flags are needed, they should be executed via ACQUIRE_MEM
before INDIRECT_BUFFER.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:46 -04:00
Marek Olšák
11317d2963 drm/amdgpu: check for LINEAR_ALIGNED correctly in check_tiling_flags_gfx6 
Fix incorrect check.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:36 -04:00
Aric Cyr
230806dddc drm/amd/display: 3.2.291 
* FW Release 0.0.224.0
* Fix bw issue for dcn351
* Fix FAMS2 logic issue for dcn401
* Fix Coverity issues
* Fix cursor issues
* Refactor dio sources

Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:35 -04:00
Roman Li
9ef37ff38d drm/amd/display: Fix array-index-out-of-bounds in dml2/FCLKChangeSupport 
[Why]
Potential out of bounds access in dml2_calculate_rq_and_dlg_params()
because the value of out_lowest_state_idx used as an index for FCLKChangeSupport
array can be greater than 1.

[How]
Currently dml2 core specifies identical values for all FCLKChangeSupport
elements. Always use index 0 in the condition to avoid out of bounds access.

Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:35 -04:00
Fangzhi Zuo
882643a95f drm/amd/display: Update efficiency bandwidth for dcn351 
Fix 4k240 underflow on dcn351

Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:35 -04:00
Tom Chung
a638b837d0 drm/amd/display: Fix refresh rate range for some panel 
[Why]
Some of the panels does not have the refresh rate range info
in base EDID and only have the refresh rate range info in
DisplayID block.
It will cause the max/min freesync refresh rate set to 0.

[How]
Try to parse the refresh rate range info from DisplayID if the
max/min refresh rate is 0.

Reviewed-by: Sun peng Li <sunpeng.li@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:35 -04:00
Xi (Alex) Liu
9ff3ba3e76 drm/amd/display: replace CRTC disable function call 
[Why]

In OTG disable workarund, CRTC is disabled immediately
to improve performance, but this may cause timing issue
in DP HPO encoder FIFO and result in blank CRCs.

[How]

Replace the immediate CRTC disable call with normal disable call

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Xi (Alex) Liu <xi.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:35 -04:00
Bhuvanachandra Pinninti
d19deabe5a drm/amd/display: Move dio files into dio folder 
[why]
Refactor the code of dio to unit test.

[how]
Moved files to respective folders and changed cMakeLists and makefiles.

Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Bhuvanachandra Pinninti <bpinnint@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:35 -04:00
Alvin Lee
057638597a drm/amd/display: Account for cursor prefetch BW in DML1 mode support 
[Description]
We need to ensure to take into account cursor prefetch BW in
mode support or we may pass ModeQuery but fail an actual flip
which will cause a hang. Flip may fail because the cursor_pre_bw
is populated during mode programming (and mode programming is
never called prior to ModeQuery).

Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-01 16:10:35 -04:00