mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-09 17:17:04 -04:00
Code Issues Packages Projects Releases Wiki Activity
1,088,704 Commits 1 Branch 929 Tags
355ea704c887303aa1a4b3c8e228cb7ccc2d54c0
Commit Graph

1088704 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Konrad Dybcio
355ea704c8 arm64: dts: qcom: msm8992: Use the correct GCC compatible 
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-7-konrad.dybcio@somainline.org
 2022-04-12 22:07:21 -05:00
Konrad Dybcio
e9b0eb5420 arm64: dts: qcom: msm8994: Add MMCC node 
Describe the Multimedia Clock Controller block in the DT.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-6-konrad.dybcio@somainline.org
 2022-04-12 22:07:18 -05:00
Konrad Dybcio
2d0f45f760 arm64: dts: qcom: msm8992-libra: Remove superfluous status = "okay" 
The framebuffer is already enabled by default.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-5-konrad.dybcio@somainline.org
 2022-04-12 22:07:17 -05:00
Konrad Dybcio
ed288ae94a arm64: dts: qcom: msm8992-libra: Temporarily restrict CPU count to 1 
The phone seems to randomly crash when more than 1 CPU is enabled, which
is probably related to lack of some driver.

Restrict the device to only use a single core until this is solved.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-4-konrad.dybcio@somainline.org
 2022-04-12 22:07:16 -05:00
Konrad Dybcio
13cff03303 arm64: dts: qcom: msm8992-libra: Add CPU regulators 
Specify CPU regulator voltages for both VDD_APC rails.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-3-konrad.dybcio@somainline.org
 2022-04-12 22:07:12 -05:00
Konrad Dybcio
5827e28304 arm64: dts: qcom: msm8994: Fix sleep clock name 
The sleep clock name expected by GCC is actually "sleep" and not
"sleep_clk". Fix the clock-names value for it to make sure it is
provided.

Fixes: 9204da57cd65 ("arm64: dts: qcom: msm8994: Provide missing "xo_board" and "sleep_clk" to GCC")

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-2-konrad.dybcio@somainline.org
 2022-04-12 22:07:04 -05:00
Akhil P Oommen
3bfef00d76 arm64: dts: qcom: sc7280: Support gpu speedbin 
Add speedbin fuse and additional OPPs for gpu to support sc7280 SKUs.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226005021.v2.5.I4c2cb95f06f0c37038c80cc1ad20563fdf0618e2@changeid
 2022-04-12 21:54:08 -05:00
Kathiravan T
f607dd767f arm64: dts: qcom: ipq8074: fix the sleep clock frequency 
Sleep clock frequency should be 32768Hz. Lets fix it.

Cc: stable@vger.kernel.org
Fixes: 41dac73e24 ("arm64: dts: Add ipq8074 SoC and HK01 board support")
Link: https://lore.kernel.org/all/e2a447f8-6024-0369-f698-2027b6edcf9e@codeaurora.org/
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644581655-11568-1-git-send-email-quic_kathirav@quicinc.com
 2022-04-12 21:35:10 -05:00
Dmitry Baryshkov
be63332992 arm64: dts: qcom: sm8250: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 7c1dffd471 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-5-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:13 -05:00
Dmitry Baryshkov
0316da6bbc arm64: dts: qcom: sdm845: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 08c2a076d1 ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-4-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:11 -05:00
Dmitry Baryshkov
63ddd8a54d arm64: dts: qcom: sdm660: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: ab29028439 ("arm64: dts: qcom: sdm660: Add required nodes for DSI1")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-3-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:10 -05:00
Dmitry Baryshkov
2a11b3bfc5 arm64: dts: qcom: sdm630: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: b52555d590 ("arm64: dts: qcom: sdm630: Add MDSS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:07 -05:00
Dmitry Baryshkov
7b36ab2673 arm64: dts: qcom: msm8996: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 12d5403757 ("arm64: dts: qcom: msm8996: Add DSI0 nodes")
Fixes: 3a4547c1fc ("arm64: qcom: msm8996.dtsi: Add Display nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-1-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:06 -05:00
Dmitry Baryshkov
37ebe34fc0 arm64: dts: qcom: sm8450-hdk: add pcie nodes 
Add device tree nodes for PCIe0/PCIe1 controllers and corresponding
PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-8-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:56 -05:00
Dmitry Baryshkov
bce9887e0f arm64: dts: qcom: sm8450-qrd: enable PCIe0 host 
Enable PCIe0 host on SM8450 QRD device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-7-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:15 -05:00
Dmitry Baryshkov
3795221250 arm64: dts: qcom: sm8450-qrd: enable PCIe0 PHY device 
Enable PCIe0 PHY on the SM8450 QRD device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-6-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:14 -05:00
Dmitry Baryshkov
bc6588bc25 arm64: dts: qcom: sm8450: add PCIe1 root device 
Add device tree node for the second PCIe host found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-5-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:13 -05:00
Dmitry Baryshkov
334d91d241 arm64: dts: qcom: sm8450: add PCIe1 PHY node 
Add device tree node for the second PCIe PHY device found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-4-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:12 -05:00
Dmitry Baryshkov
7b09b1b473 arm64: dts: qcom: sm8450: add PCIe0 RC device 
Add device tree node for the first PCIe host found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-3-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:11 -05:00
Dmitry Baryshkov
d41a72c24c arm64: dts: qcom: sm8450: add PCIe0 PHY node 
Add device tree node for the first PCIe PHY device found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-2-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:10 -05:00
Taniya Das
9499240d15 arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers 
Add the low pass audio clock controller device nodes.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220202053207.14256-1-tdas@codeaurora.org
 2022-04-12 21:19:31 -05:00
Bjorn Andersson
ef043b0dbf Merge branch '20220223172248.18877-1-tdas@codeaurora.org' into arm64-for-5.19 2022-04-12 21:18:13 -05:00
Taniya Das
4185b27b3b dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280 
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for
LPASS core clocks and audio clock IDs for LPASS client to request for
the clocks.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220223172248.18877-1-tdas@codeaurora.org
 2022-04-12 21:16:48 -05:00
Kuldeep Singh
095a7137ba arm64: dts: qcom: msm8996: User generic node name for DMA 
Qcom BAM DT spec expects generic DMA controller node name as
"dma-controller" to enable validations.

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410175056.79330-4-singh.kuldeep87k@gmail.com
 2022-04-12 19:36:01 -05:00
Stephan Gerhold
372c1c3dd7 arm64: dts: qcom: msm8916-huawei-g7: Add sound card 
The huawei-g7 uses the msm8916-wcd-digital/analog audio codecs similar
to apq8016-sbc, so we can mostly copy paste it from there to make audio
work correctly. The main difference is the hphl-jack-type-normally-open
property, which is needed to avoid inverted audio jack detection.

Note that at least on my device the jack detection is not fully
reliable: sometimes headphones are detected as headsets (with
microphone). However, this is not a big problem for typical usage.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410195113.13646-3-stephan@gerhold.net
 2022-04-12 14:28:22 -05:00
Stephan Gerhold
d317344d6e arm64: dts: qcom: msm8916-huawei-g7: Clarify installation instructions 
The comment with installation instructions in the huawei-g7 device tree
is a bit misleading and does not describe the recommended installation
steps very well. The bootloader is actually not patched; to avoid all
trouble with the vendor bootloader it is easier to bypass it completely
by jumping to a custom bootloader (e.g. based on the open-source LK
released by Qualcomm).

To avoid confusion, simplify the comment to state only the problem
and then refer to the wiki article which contains detailed suggested
installation instructions. This will also make it easier to keep it
up to date with new developments in the future.

Fixes: 55056b2291 ("arm64: dts: qcom: msm8916: Add device tree for Huawei Ascend G7")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410195113.13646-2-stephan@gerhold.net
 2022-04-12 14:28:20 -05:00
Konrad Dybcio
551b614e23 arm64: dts: qcom: sm8250-edo: Add dual CS35L41 amps 
Add nodes for dual Cirrus Logic CS35L41 audio amps connected via I2C.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222014806.22446-1-konrad.dybcio@somainline.org
 2022-04-12 14:22:05 -05:00
Shaik Sajida Bhanu
959cb51307 arm64: dts: qcom: sc7280: Add reset entries for SDCC controllers 
Add gcc hardware reset entries for eMMC and SD card.

Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649759528-15125-3-git-send-email-quic_c_sbhanu@quicinc.com
 2022-04-12 13:53:38 -05:00
Douglas Anderson
5a026558d2 arm64: dts: qcom: sc7280-herobrine: Audio codec wants 1.8V, not 1.62V 
The L2C rail on herobrine boards is intended to go to the audio
codec. Let's override the 1.62V specified in the qcard.dtsi file to be
1.8V.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411141332.v2.1.I9f06fec63b978699fe62591fec9e5ac31bb3a69d@changeid
 2022-04-12 09:21:17 -05:00
Bhupesh Sharma
7011db96f6 arm64: dts: qcom: ipq6018: Fix qmp usb3 phy node 
Fix the following 'make dtbs_check' warning(s) by
using phy@ instead of lanes@ and by moving '#clock-cells' to
sub-node:

arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: ssphy@78000:
 'lane@78200' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
[bjorn: s/clock-names/clock-cells/ per Shawn's feedback]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-7-bhupesh.sharma@linaro.org
 2022-04-12 09:21:17 -05:00
Bhupesh Sharma
c769a3521d arm64: dts: qcom: sm8450: Fix qmp ufs phy node (use phy@ instead of lanes@) 
Fix the 'make dtbs_check' warning:

arch/arm64/boot/dts/qcom/sm8450-qrd.dt.yaml: phy@1d87000:
 'lanes@1d87400' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-6-bhupesh.sharma@linaro.org
 2022-04-12 09:21:17 -05:00
Bhupesh Sharma
56205c56ea arm64: dts: qcom: sc7280: Fix qmp phy node (use phy@ instead of lanes@) 
Fix the 'make dtbs_check' warning:

arch/arm64/boot/dts/qcom/sc7280-idp.dt.yaml: phy@1c0e000:
  'lanes@1c0e200' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-5-bhupesh.sharma@linaro.org
 2022-04-12 09:21:17 -05:00
Bhupesh Sharma
cde8b4d070 arm64: dts: qcom: msm8996-xiaomi: Drop max-microamp and vddp-ref-clk properties from QMP PHY 
The following properties are not supported and causing dtbs_check
warnings.

    - vdda-phy-max-microamp
    - vdda-pll-max-microamp
    - vddp-ref-clk-max-microamp
    - vddp-ref-clk-always-on

arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dt.yaml: phy@627000:
   'vdda-phy-max-microamp', 'vddp-ref-clk-always-on', 'vddp-ref-clk-max-microamp'
    do not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Drop them from QMP PHY nodes for 'msm8996-xiaomi' dts.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-4-bhupesh.sharma@linaro.org
 2022-04-12 09:21:17 -05:00
Stephan Gerhold
c38406aa46 arm64: dts: qcom: msm8916: Add BAM-DMUX for WWAN network interfaces 
The BAM Data Multiplexer provides access to the network data channels
of modems integrated into many older Qualcomm SoCs, including MSM8916.

Add the nodes for the BAM DMA engine and BAM-DMUX to enable using WWAN
on smartphones/tablets based on MSM8916. This should work out of the box
with open-source WWAN userspace such as ModemManager.

The nodes are disabled by default to avoid loading unnecessary drivers
on devices that cannot use BAM-DMUX (e.g. DragonBoard 410c). However,
strictly speaking the nodes could be enabled by default since both the
bam_dma and bam_dmux driver will simply do nothing if the modem does
not announce any BAM-DMUX channels.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228225400.146555-3-stephan@gerhold.net
 2022-04-12 09:21:17 -05:00
Dmitry Baryshkov
64d3cb73b3 arm64: dts: qcom: add pm8450 support 
Add PM8450 PMIC device tree include file. It is going to be used by
SM8450-based devices.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-8-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:17 -05:00
Dmitry Baryshkov
7dc11169a0 arm64: dts: qcom: pmr735a: stop depending on thermal_zones label 
Most of SoC device trees do not provide the thermal_zones label. Thus
stop depending on it and use the full path to the thermal zones nodes.

Fixes: 7a3544e5d4 ("arm64: dts: qcom: pmr735a: Add temp-alarm support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-6-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:17 -05:00
Dmitry Baryshkov
d67ddd17de arm64: dts: qcom: pm8350c: stop depending on thermal_zones label 
Most of SoC device trees do not provide the thermal_zones label. Thus
stop depending on it and use the full path to the thermal zones nodes.

Fixes: 3795fe7d49 ("arm64: dts: qcom: pm8350c: Add temp-alarm support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-5-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
6f3426b3de arm64: dts: qcom: pmr735b: add temp sensor and thermal zone config 
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-4-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
5c1399299d arm64: dts: qcom: pm8350b: add temp sensor and thermal zone config 
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-3-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
7a79b95f42 arm64: dts: qcom: pm8350: add temp sensor and thermal zone config 
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-2-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:16 -05:00
Baruch Siach
a2d2c809cf arm64: dts: qcom: ipq6018: Add mdio bus description 
The IPQ60xx has the same MDIO bug block as IPQ4019. Add IO range and
clock resources description.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/ef01a79ccc6ef86dc3a10d0fa3331794d49e9859.1646031524.git.baruch@tkos.co.il
 2022-04-12 09:21:16 -05:00
Jami Kettunen
726111e687 arm64: dts: qcom: msm8998-oneplus-common: Add NFC 
The OnePlus 5/5T both have an NXP PN553 which is supported by the
nxp-nci-i2c driver in mainline. It detects/reads NFC tags using
"nfctool" and with the NearD test scripts data can also be written
to be received by another device.

Signed-off-by: Jami Kettunen <jami.kettunen@somainline.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220225215642.3916-1-jami.kettunen@somainline.org
 2022-04-12 09:21:16 -05:00
Sankeerth Billakanti
e036b77be7 arm64: dts: qcom: sc7280: rename edp_out label to mdss_edp_out 
Rename the edp_out label in the sc7280 platform to mdss_edp_out
so that the nodes related to mdss are all grouped together in
the board specific files.

Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647452154-16361-2-git-send-email-quic_sbillaka@quicinc.com
 2022-04-12 09:21:16 -05:00
Vinod Koul
c5cb42cc84 arm64: dts: qcom: sa8155p-adp: Enable ethernet node 
Enable the ethernet node, add the phy node and pinctrl for ethernet.

[bhsharma: Correct ethernet/rgmii related pinmuxs, specify multi-queues and
 plug in the PHY interrupt for WOL]

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325163537.1579969-3-bhupesh.sharma@linaro.org
 2022-04-12 09:21:16 -05:00
Vinod Koul
05f333b746 arm64: dts: qcom: sm8150: add ethernet node 
SM8150 SoC supports ethqos ethernet controller so add the node for it

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
[bhsharma: Correct ethernet interrupt numbers and add power-domain]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325163537.1579969-2-bhupesh.sharma@linaro.org
 2022-04-12 09:21:16 -05:00
Luca Weiss
606efee957 arm64: dts: qcom: sm7225-fairphone-fp4: Enable UFS 
Configure and enable the nodes for UFS that are used for internal
storage on FP4.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220321133318.99406-7-luca.weiss@fairphone.com
 2022-04-12 09:21:16 -05:00
Luca Weiss
5a814af5fc arm64: dts: qcom: sm6350: Add UFS nodes 
Add the necessary nodes for UFS and its PHY.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220321133318.99406-6-luca.weiss@fairphone.com
 2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
0e0a8e35d7 arm64: dts: qcom: sdm845: correct dynamic power coefficients 
Following sm8150/sm8250 update sdm845 capacity-dmips-mhz and
dynamic-power-coefficient based on the measurements [1], [2].

The energy model dynamic-power-coefficient values were calculated with
    DPC = µW / MHz / V^2
for each OPP, and averaged across all OPPs within each cluster for the
final coefficient. Voltages were obtained from the qcom-cpufreq-hw
driver that reads voltages from the OSM LUT programmed into the SoC.

Normalized DMIPS/MHz capacity scale values for each CPU were calculated
from CoreMarks/MHz (CoreMark iterations per second per MHz), which
serves the same purpose. For each CPU, the final capacity-dmips-mhz
value is the C/MHz value of its maximum frequency normalized to
SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system.

For more details on measurement process see the commit message for the
commit 6aabed5526 ("arm64: dts: qcom: sm8250: Add CPU capacities and
energy model").

[1] https://github.com/kdrag0n/freqbench
[2] https://github.com/kdrag0n/freqbench/tree/master/results/sdm845/main

Cc: Danny Lin <danny@kdrag0n.dev>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220315141104.730235-1-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:16 -05:00
Bhupesh Sharma
6127d8e4cd arm64: dts: qcom: sm8150: Add PDC as the interrupt parent for tlmm 
Several wakeup gpios supported by the Top Level Mode Multiplexer (TLMM)
block on sm8150 can be used as interrupt sources and these interrupts
are routed to the PDC interrupt controller.

So, specify PDC as the interrupt parent for the TLMM block.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226184028.111566-5-bhupesh.sharma@linaro.org
 2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
91d70eb708 arm64: dts: qcom: sm8450: add fastrpc nodes 
Add fastrpc device tree nodes for aDSP, cDSP and SLPI.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410205901.1672089-3-dmitry.baryshkov@linaro.org
 2022-04-12 09:21:16 -05:00