mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-06 01:59:54 -04:00
Merge tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v6.1-rc1 These changes enable PCI, Ethernet and HDA support on Jetson AGX Orin. DMA support is enabled for I2C on a number of SoC generations and the Google Pixel C (a.k.a. Smaug) device receives Bluetooth and Wi-Fi support. Other than that this also contains some minor cleanups and fixes. * tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Add GPCDMA support for Tegra I2C arm64: tegra: Add iommus for HDA on Tegra234 arm64: tegra: Enable HDA node for Jetson AGX Orin arm64: tegra: Add context isolation domains on Tegra234 arm64: tegra: Fixup iommu-map property formatting arm64: dts: tegra: smaug: Add Wi-Fi node arm64: dts: tegra: smaug: Add Bluetooth node arm64: tegra: Enable MGBE on Jetson AGX Orin Developer Kit arm64: tegra: Add MGBE nodes on Tegra234 arm64: tegra: Fix up compatible for Tegra234 GPCDMA arm64: tegra: Enable PCIe slots in P3737-0000 board arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT arm64: tegra: Add regulators required for PCIe Link: https://lore.kernel.org/r/20220916101957.1635854-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -672,6 +672,10 @@ gen1_i2c: i2c@3160000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA186_RESET_I2C1>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 21>, <&gpcdma 21>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -685,6 +689,10 @@ cam_i2c: i2c@3180000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA186_RESET_I2C3>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 23>, <&gpcdma 23>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -702,6 +710,10 @@ dp_aux_ch1_i2c: i2c@3190000 {
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pinctrl-names = "default", "idle";
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pinctrl-0 = <&state_dpaux1_i2c>;
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pinctrl-1 = <&state_dpaux1_off>;
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 26>, <&gpcdma 26>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -733,6 +745,10 @@ dp_aux_ch0_i2c: i2c@31b0000 {
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pinctrl-names = "default", "idle";
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pinctrl-0 = <&state_dpaux_i2c>;
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pinctrl-1 = <&state_dpaux_off>;
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 30>, <&gpcdma 30>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -746,6 +762,10 @@ gen7_i2c: i2c@31c0000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA186_RESET_I2C7>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 27>, <&gpcdma 27>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -759,6 +779,10 @@ gen9_i2c: i2c@31e0000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA186_RESET_I2C9>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 31>, <&gpcdma 31>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -1176,6 +1200,10 @@ gen2_i2c: i2c@c240000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA186_RESET_I2C2>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 22>, <&gpcdma 22>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -1189,6 +1217,10 @@ gen8_i2c: i2c@c250000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA186_RESET_I2C8>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 0>, <&gpcdma 0>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -1485,15 +1517,14 @@ host1x@13e00000 {
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iommus = <&smmu TEGRA186_SID_HOST1X>;
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/* Context isolation domains */
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iommu-map = <
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0 &smmu TEGRA186_SID_HOST1X_CTX0 1
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1 &smmu TEGRA186_SID_HOST1X_CTX1 1
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2 &smmu TEGRA186_SID_HOST1X_CTX2 1
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3 &smmu TEGRA186_SID_HOST1X_CTX3 1
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4 &smmu TEGRA186_SID_HOST1X_CTX4 1
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5 &smmu TEGRA186_SID_HOST1X_CTX5 1
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6 &smmu TEGRA186_SID_HOST1X_CTX6 1
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7 &smmu TEGRA186_SID_HOST1X_CTX7 1>;
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iommu-map = <0 &smmu TEGRA186_SID_HOST1X_CTX0 1>,
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<1 &smmu TEGRA186_SID_HOST1X_CTX1 1>,
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<2 &smmu TEGRA186_SID_HOST1X_CTX2 1>,
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<3 &smmu TEGRA186_SID_HOST1X_CTX3 1>,
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<4 &smmu TEGRA186_SID_HOST1X_CTX4 1>,
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<5 &smmu TEGRA186_SID_HOST1X_CTX5 1>,
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<6 &smmu TEGRA186_SID_HOST1X_CTX6 1>,
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<7 &smmu TEGRA186_SID_HOST1X_CTX7 1>;
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dpaux1: dpaux@15040000 {
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compatible = "nvidia,tegra186-dpaux";
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@@ -805,6 +805,10 @@ gen1_i2c: i2c@3160000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA194_RESET_I2C1>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 21>, <&gpcdma 21>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -830,6 +834,10 @@ cam_i2c: i2c@3180000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA194_RESET_I2C3>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 23>, <&gpcdma 23>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -847,6 +855,10 @@ dp_aux_ch1_i2c: i2c@3190000 {
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pinctrl-0 = <&state_dpaux1_i2c>;
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pinctrl-1 = <&state_dpaux1_off>;
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pinctrl-names = "default", "idle";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 26>, <&gpcdma 26>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -864,6 +876,10 @@ dp_aux_ch0_i2c: i2c@31b0000 {
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pinctrl-0 = <&state_dpaux0_i2c>;
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pinctrl-1 = <&state_dpaux0_off>;
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pinctrl-names = "default", "idle";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 30>, <&gpcdma 30>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -881,6 +897,10 @@ dp_aux_ch2_i2c: i2c@31c0000 {
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pinctrl-0 = <&state_dpaux2_i2c>;
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pinctrl-1 = <&state_dpaux2_off>;
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pinctrl-names = "default", "idle";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 27>, <&gpcdma 27>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -898,6 +918,10 @@ dp_aux_ch3_i2c: i2c@31e0000 {
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pinctrl-0 = <&state_dpaux3_i2c>;
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pinctrl-1 = <&state_dpaux3_off>;
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pinctrl-names = "default", "idle";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 31>, <&gpcdma 31>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -1565,6 +1589,10 @@ gen2_i2c: i2c@c240000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA194_RESET_I2C2>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 22>, <&gpcdma 22>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -1578,6 +1606,10 @@ gen8_i2c: i2c@c250000 {
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clock-names = "div-clk";
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resets = <&bpmp TEGRA194_RESET_I2C8>;
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reset-names = "i2c";
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iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
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dma-coherent;
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dmas = <&gpcdma 0>, <&gpcdma 0>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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@@ -1869,15 +1901,14 @@ host1x@13e00000 {
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iommus = <&smmu TEGRA194_SID_HOST1X>;
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/* Context isolation domains */
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iommu-map = <
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0 &smmu TEGRA194_SID_HOST1X_CTX0 1
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1 &smmu TEGRA194_SID_HOST1X_CTX1 1
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2 &smmu TEGRA194_SID_HOST1X_CTX2 1
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3 &smmu TEGRA194_SID_HOST1X_CTX3 1
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4 &smmu TEGRA194_SID_HOST1X_CTX4 1
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5 &smmu TEGRA194_SID_HOST1X_CTX5 1
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6 &smmu TEGRA194_SID_HOST1X_CTX6 1
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7 &smmu TEGRA194_SID_HOST1X_CTX7 1>;
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iommu-map = <0 &smmu TEGRA194_SID_HOST1X_CTX0 1>,
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<1 &smmu TEGRA194_SID_HOST1X_CTX1 1>,
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<2 &smmu TEGRA194_SID_HOST1X_CTX2 1>,
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<3 &smmu TEGRA194_SID_HOST1X_CTX3 1>,
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<4 &smmu TEGRA194_SID_HOST1X_CTX4 1>,
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<5 &smmu TEGRA194_SID_HOST1X_CTX5 1>,
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<6 &smmu TEGRA194_SID_HOST1X_CTX6 1>,
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<7 &smmu TEGRA194_SID_HOST1X_CTX7 1>;
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nvdec@15140000 {
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compatible = "nvidia,tegra194-nvdec";
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@@ -17,6 +17,7 @@ / {
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aliases {
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serial0 = &uarta;
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serial3 = &uartd;
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};
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chosen {
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@@ -1309,6 +1310,22 @@ serial@70006000 {
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status = "okay";
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};
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uartd: serial@70006300 {
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compatible = "nvidia,tegra30-hsuart";
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm43540-bt";
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max-speed = <4000000>;
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brcm,bt-pcm-int-params = [01 02 00 01 01];
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device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
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shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "host-wakeup";
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||||
};
|
||||
};
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||||
|
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i2c@7000c400 {
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status = "okay";
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||||
clock-frequency = <1000000>;
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||||
@@ -1692,6 +1709,25 @@ usb3-0 {
|
||||
};
|
||||
};
|
||||
|
||||
mmc@700b0200 {
|
||||
power-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
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vqmmc-supply = <&pp1800>;
|
||||
vmmc-supply = <&pp3300>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
wifi@1 {
|
||||
compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac";
|
||||
reg = <1>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
mmc@700b0600 {
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
|
||||
@@ -6,6 +6,42 @@ / {
|
||||
model = "NVIDIA Jetson AGX Orin";
|
||||
compatible = "nvidia,p3701-0000", "nvidia,tegra234";
|
||||
|
||||
vdd_1v8_ls: regulator-vdd-1v8-ls {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_1V8_LS";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd_1v8_ao: regulator-vdd-1v8-ao {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_1V8_AO";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd_3v3_pcie: regulator-vdd-3v3-pcie {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_3V3_PCIE";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio TEGRA234_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
|
||||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
vdd_12v_pcie: regulator-vdd-12v-pcie {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_12V_PCIE";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
gpio = <&gpio TEGRA234_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW>;
|
||||
regulator-boot-on;
|
||||
enable-active-low;
|
||||
};
|
||||
|
||||
bus@0 {
|
||||
spi@3270000 {
|
||||
status = "okay";
|
||||
|
||||
@@ -2009,6 +2009,7 @@ serial@3100000 {
|
||||
|
||||
hda@3510000 {
|
||||
nvidia,model = "NVIDIA Jetson AGX Orin HDA";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -2017,6 +2018,27 @@ chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
bus@0 {
|
||||
ethernet@6800000 {
|
||||
status = "okay";
|
||||
|
||||
phy-handle = <&mgbe0_phy>;
|
||||
phy-mode = "usxgmii";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mgbe0_phy: phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0x0>;
|
||||
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
status = "okay";
|
||||
@@ -2111,4 +2133,55 @@ sound {
|
||||
|
||||
label = "NVIDIA Jetson AGX Orin APE";
|
||||
};
|
||||
|
||||
pcie@14100000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
|
||||
phys = <&p2u_hsio_3>;
|
||||
phy-names = "p2u-0";
|
||||
};
|
||||
|
||||
pcie@14160000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
|
||||
phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
|
||||
<&p2u_hsio_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
|
||||
};
|
||||
|
||||
pcie@141a0000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
vpcie3v3-supply = <&vdd_3v3_pcie>;
|
||||
vpcie12v-supply = <&vdd_12v_pcie>;
|
||||
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
|
||||
pcie-ep@141a0000 {
|
||||
status = "disabled";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
|
||||
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>;
|
||||
|
||||
nvidia,refclk-select-gpios = <&gpio_aon
|
||||
TEGRA234_AON_GPIO(AA, 4)
|
||||
GPIO_ACTIVE_HIGH>;
|
||||
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
};
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user