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arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level
MDIO nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with a pinmux. As the attached PHY is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the MDIO nodes (in both CPSW and ICSSG) in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-9-afd@ti.com
This commit is contained in:
committed by
Nishanth Menon
parent
aa62d66124
commit
f572888b3c
@@ -552,6 +552,7 @@ cpsw3g_mdio: mdio@f00 {
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clocks = <&k3_clks 13 0>;
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clock-names = "fck";
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bus_freq = <1000000>;
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status = "disabled";
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};
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cpts@3d000 {
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@@ -1168,6 +1169,7 @@ icssg0_mdio: mdio@32400 {
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#address-cells = <1>;
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#size-cells = <0>;
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bus_freq = <1000000>;
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status = "disabled";
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};
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};
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@@ -1308,6 +1310,7 @@ icssg1_mdio: mdio@32400 {
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clocks = <&k3_clks 82 0>;
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clock-names = "fck";
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bus_freq = <1000000>;
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status = "disabled";
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};
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};
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@@ -440,6 +440,7 @@ &cpsw_port2 {
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};
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&cpsw3g_mdio {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio1_pins_default>;
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@@ -575,14 +576,6 @@ &ecap0 {
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pinctrl-0 = <&main_ecap0_pins_default>;
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};
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&icssg0_mdio {
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status = "disabled";
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};
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&icssg1_mdio {
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status = "disabled";
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};
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&main_mcan0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_mcan0_pins_default>;
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@@ -454,6 +454,7 @@ &cpsw_port2 {
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};
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&cpsw3g_mdio {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio1_pins_default>;
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@@ -566,14 +567,6 @@ &ecap0 {
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pinctrl-0 = <&main_ecap0_pins_default>;
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};
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&icssg0_mdio {
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status = "disabled";
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};
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&icssg1_mdio {
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status = "disabled";
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};
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&main_mcan0 {
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status = "disabled";
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};
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