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arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node
Although usually integrated as a child of an Ethernet controller, MDIO IP has an independent pinout. This pinout should be controlled by the MDIO node (so if it was to be disabled for instance, the pinmux state would reflect that). Move the MDIO pins pinmux to the MIDO nodes. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-8-afd@ti.com
This commit is contained in:
committed by
Nishanth Menon
parent
3e21ec289c
commit
aa62d66124
@@ -425,8 +425,7 @@ &usb0 {
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&cpsw3g {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio1_pins_default
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&rgmii1_pins_default
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pinctrl-0 = <&rgmii1_pins_default
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&rgmii2_pins_default>;
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};
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@@ -441,6 +440,9 @@ &cpsw_port2 {
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};
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&cpsw3g_mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio1_pins_default>;
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cpsw3g_phy0: ethernet-phy@0 {
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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@@ -439,8 +439,7 @@ &usb0 {
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&cpsw3g {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio1_pins_default
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&rgmii1_pins_default
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pinctrl-0 = <&rgmii1_pins_default
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&rgmii2_pins_default>;
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};
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@@ -455,6 +454,9 @@ &cpsw_port2 {
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};
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&cpsw3g_mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio1_pins_default>;
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cpsw3g_phy0: ethernet-phy@0 {
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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