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drm/i915/display: Move regfile registers intel_display.restore

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The intel_display struct already has a place for save/restore
stuff. Move the i915's regfile there since they are only
related to display.

Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241113225016.208673-3-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Rodrigo Vivi
2024-11-13 17:50:12 -05:00
parent c3bda71543
commit ec803c9b00
3 changed files with 27 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
drivers/gpu/drm/i915/display/i9xx_display_sr.c
View File

@@ -12,56 +12,59 @@
static void i9xx_display_save_swf(struct drm_i915_private *i915)
{
struct intel_display *display = &i915->display;
int i;
/* Scratch space */
if (GRAPHICS_VER(i915) == 2 && IS_MOBILE(i915)) {
for (i = 0; i < 7; i++) {
i915->regfile.saveSWF0[i] = intel_de_read(i915, SWF0(i915, i));
i915->regfile.saveSWF1[i] = intel_de_read(i915, SWF1(i915, i));
display->restore.saveSWF0[i] = intel_de_read(display, SWF0(i915, i));
display->restore.saveSWF1[i] = intel_de_read(display, SWF1(i915, i));
}
for (i = 0; i < 3; i++)
i915->regfile.saveSWF3[i] = intel_de_read(i915, SWF3(i915, i));
display->restore.saveSWF3[i] = intel_de_read(display, SWF3(i915, i));
} else if (GRAPHICS_VER(i915) == 2) {
for (i = 0; i < 7; i++)
i915->regfile.saveSWF1[i] = intel_de_read(i915, SWF1(i915, i));
display->restore.saveSWF1[i] = intel_de_read(display, SWF1(i915, i));
} else if (HAS_GMCH(i915)) {
for (i = 0; i < 16; i++) {
i915->regfile.saveSWF0[i] = intel_de_read(i915, SWF0(i915, i));
i915->regfile.saveSWF1[i] = intel_de_read(i915, SWF1(i915, i));
display->restore.saveSWF0[i] = intel_de_read(display, SWF0(i915, i));
display->restore.saveSWF1[i] = intel_de_read(display, SWF1(i915, i));
}
for (i = 0; i < 3; i++)
i915->regfile.saveSWF3[i] = intel_de_read(i915, SWF3(i915, i));
display->restore.saveSWF3[i] = intel_de_read(display, SWF3(i915, i));
}
}
static void i9xx_display_restore_swf(struct drm_i915_private *i915)
{
struct intel_display *display = &i915->display;
int i;
/* Scratch space */
if (GRAPHICS_VER(i915) == 2 && IS_MOBILE(i915)) {
for (i = 0; i < 7; i++) {
intel_de_write(i915, SWF0(i915, i), i915->regfile.saveSWF0[i]);
intel_de_write(i915, SWF1(i915, i), i915->regfile.saveSWF1[i]);
intel_de_write(display, SWF0(i915, i), display->restore.saveSWF0[i]);
intel_de_write(display, SWF1(i915, i), display->restore.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(i915, SWF3(i915, i), i915->regfile.saveSWF3[i]);
intel_de_write(display, SWF3(i915, i), display->restore.saveSWF3[i]);
} else if (GRAPHICS_VER(i915) == 2) {
for (i = 0; i < 7; i++)
intel_de_write(i915, SWF1(i915, i), i915->regfile.saveSWF1[i]);
intel_de_write(display, SWF1(i915, i), display->restore.saveSWF1[i]);
} else if (HAS_GMCH(i915)) {
for (i = 0; i < 16; i++) {
intel_de_write(i915, SWF0(i915, i), i915->regfile.saveSWF0[i]);
intel_de_write(i915, SWF1(i915, i), i915->regfile.saveSWF1[i]);
intel_de_write(display, SWF0(i915, i), display->restore.saveSWF0[i]);
intel_de_write(display, SWF1(i915, i), display->restore.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(i915, SWF3(i915, i), i915->regfile.saveSWF3[i]);
intel_de_write(display, SWF3(i915, i), display->restore.saveSWF3[i]);
}
}
void i9xx_display_sr_save(struct drm_i915_private *i915)
{
struct intel_display *display = &i915->display;
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
if (!HAS_DISPLAY(i915))
@@ -69,16 +72,17 @@ void i9xx_display_sr_save(struct drm_i915_private *i915)
/* Display arbitration control */
if (GRAPHICS_VER(i915) <= 4)
i915->regfile.saveDSPARB = intel_de_read(i915, DSPARB(i915));
display->restore.saveDSPARB = intel_de_read(display, DSPARB(i915));
if (GRAPHICS_VER(i915) == 4)
pci_read_config_word(pdev, GCDGMBUS, &i915->regfile.saveGCDGMBUS);
pci_read_config_word(pdev, GCDGMBUS, &display->restore.saveGCDGMBUS);
i9xx_display_save_swf(i915);
}
void i9xx_display_sr_restore(struct drm_i915_private *i915)
{
struct intel_display *display = &i915->display;
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
if (!HAS_DISPLAY(i915))
@@ -87,9 +91,9 @@ void i9xx_display_sr_restore(struct drm_i915_private *i915)
i9xx_display_restore_swf(i915);
if (GRAPHICS_VER(i915) == 4)
pci_write_config_word(pdev, GCDGMBUS, i915->regfile.saveGCDGMBUS);
pci_write_config_word(pdev, GCDGMBUS, display->restore.saveGCDGMBUS);
/* Display arbitration */
if (GRAPHICS_VER(i915) <= 4)
intel_de_write(i915, DSPARB(i915), i915->regfile.saveDSPARB);
intel_de_write(display, DSPARB(i915), display->restore.saveDSPARB);
}

5
drivers/gpu/drm/i915/display/intel_display_core.h
View File

@@ -505,6 +505,11 @@ struct intel_display {
/* restore state for suspend/resume and display reset */
struct drm_atomic_state *modeset_state;
struct drm_modeset_acquire_ctx reset_ctx;
u32 saveDSPARB;
u32 saveSWF0[16];
u32 saveSWF1[16];
u32 saveSWF3[3];
u16 saveGCDGMBUS;
} restore;
struct {

9
drivers/gpu/drm/i915/i915_drv.h
View File

@@ -101,14 +101,6 @@ struct i915_dsm {
resource_size_t usable_size;
};
struct i915_suspend_saved_registers {
u32 saveDSPARB;
u32 saveSWF0[16];
u32 saveSWF1[16];
u32 saveSWF3[3];
u16 saveGCDGMBUS;
};
#define MAX_L3_SLICES 2
struct intel_l3_parity {
u32 *remap_info[MAX_L3_SLICES];
@@ -299,7 +291,6 @@ struct drm_i915_private {
struct i915_gpu_error gpu_error;
u32 suspend_count;
struct i915_suspend_saved_registers regfile;
struct vlv_s0ix_state *vlv_s0ix_state;
struct dram_info {