mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-09 09:01:36 -04:00
Code Issues Packages Projects Releases Wiki Activity

drm/i915/display: Convert i915_suspend into i9xx_display_sr

Browse Source 
These save & restore functions inside i915_suspend are old display
functions to save and restore a bunch of display related registers.

Move it under display and rename accordantly. Just don't move it
entirely towards intel_display struct yet because it depends
on drm_i915_private for the IS_MOBILE.

While doing this conversion also update the MIT header using
the new SPDX ones.

v2: Fix Makefile and include (Jani)
    Removed vga and gmbus (Jani, Ville)

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241113225016.208673-2-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Rodrigo Vivi
2024-11-13 17:50:11 -05:00
parent 8985cb7a09
commit c3bda71543
6 changed files with 113 additions and 153 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/Makefile
View File

@@ -30,7 +30,6 @@ i915-y += \
i915_params.o \
i915_pci.o \
i915_scatterlist.o \
i915_suspend.o \
i915_switcheroo.o \
i915_sysfs.o \
i915_utils.o \
@@ -220,6 +219,7 @@ i915-$(CONFIG_HWMON) += \
i915-y += \
display/hsw_ips.o \
display/i9xx_plane.o \
display/i9xx_display_sr.o \
display/i9xx_wm.o \
display/intel_alpm.o \
display/intel_atomic.o \

95
drivers/gpu/drm/i915/display/i9xx_display_sr.c Normal file
View File

@@ -0,0 +1,95 @@
// SPDX-License-Identifier: MIT
/*
* Copyright © 2024 Intel Corporation
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "i9xx_display_sr.h"
#include "intel_de.h"
#include "intel_gmbus.h"
#include "intel_pci_config.h"
static void i9xx_display_save_swf(struct drm_i915_private *i915)
{
int i;
/* Scratch space */
if (GRAPHICS_VER(i915) == 2 && IS_MOBILE(i915)) {
for (i = 0; i < 7; i++) {
i915->regfile.saveSWF0[i] = intel_de_read(i915, SWF0(i915, i));
i915->regfile.saveSWF1[i] = intel_de_read(i915, SWF1(i915, i));
}
for (i = 0; i < 3; i++)
i915->regfile.saveSWF3[i] = intel_de_read(i915, SWF3(i915, i));
} else if (GRAPHICS_VER(i915) == 2) {
for (i = 0; i < 7; i++)
i915->regfile.saveSWF1[i] = intel_de_read(i915, SWF1(i915, i));
} else if (HAS_GMCH(i915)) {
for (i = 0; i < 16; i++) {
i915->regfile.saveSWF0[i] = intel_de_read(i915, SWF0(i915, i));
i915->regfile.saveSWF1[i] = intel_de_read(i915, SWF1(i915, i));
}
for (i = 0; i < 3; i++)
i915->regfile.saveSWF3[i] = intel_de_read(i915, SWF3(i915, i));
}
}
static void i9xx_display_restore_swf(struct drm_i915_private *i915)
{
int i;
/* Scratch space */
if (GRAPHICS_VER(i915) == 2 && IS_MOBILE(i915)) {
for (i = 0; i < 7; i++) {
intel_de_write(i915, SWF0(i915, i), i915->regfile.saveSWF0[i]);
intel_de_write(i915, SWF1(i915, i), i915->regfile.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(i915, SWF3(i915, i), i915->regfile.saveSWF3[i]);
} else if (GRAPHICS_VER(i915) == 2) {
for (i = 0; i < 7; i++)
intel_de_write(i915, SWF1(i915, i), i915->regfile.saveSWF1[i]);
} else if (HAS_GMCH(i915)) {
for (i = 0; i < 16; i++) {
intel_de_write(i915, SWF0(i915, i), i915->regfile.saveSWF0[i]);
intel_de_write(i915, SWF1(i915, i), i915->regfile.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(i915, SWF3(i915, i), i915->regfile.saveSWF3[i]);
}
}
void i9xx_display_sr_save(struct drm_i915_private *i915)
{
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
if (!HAS_DISPLAY(i915))
return;
/* Display arbitration control */
if (GRAPHICS_VER(i915) <= 4)
i915->regfile.saveDSPARB = intel_de_read(i915, DSPARB(i915));
if (GRAPHICS_VER(i915) == 4)
pci_read_config_word(pdev, GCDGMBUS, &i915->regfile.saveGCDGMBUS);
i9xx_display_save_swf(i915);
}
void i9xx_display_sr_restore(struct drm_i915_private *i915)
{
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
if (!HAS_DISPLAY(i915))
return;
i9xx_display_restore_swf(i915);
if (GRAPHICS_VER(i915) == 4)
pci_write_config_word(pdev, GCDGMBUS, i915->regfile.saveGCDGMBUS);
/* Display arbitration */
if (GRAPHICS_VER(i915) <= 4)
intel_de_write(i915, DSPARB(i915), i915->regfile.saveDSPARB);
}

14
drivers/gpu/drm/i915/display/i9xx_display_sr.h Normal file
View File

@@ -0,0 +1,14 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2024 Intel Corporation
*/
#ifndef __I9XX_DISPLAY_SR_H__
#define __I9XX_DISPLAY_SR_H__
struct drm_i915_private;
void i9xx_display_sr_save(struct drm_i915_private *i915);
void i9xx_display_sr_restore(struct drm_i915_private *i915);
#endif

6
drivers/gpu/drm/i915/i915_driver.c
View File

@@ -45,6 +45,7 @@
#include <drm/drm_managed.h>
#include <drm/drm_probe_helper.h>
#include "display/i9xx_display_sr.h"
#include "display/intel_acpi.h"
#include "display/intel_bw.h"
#include "display/intel_cdclk.h"
@@ -94,7 +95,6 @@
#include "i915_memcpy.h"
#include "i915_perf.h"
#include "i915_query.h"
#include "i915_suspend.h"
#include "i915_switcheroo.h"
#include "i915_sysfs.h"
#include "i915_utils.h"
@@ -1054,7 +1054,7 @@ static int i915_drm_suspend(struct drm_device *dev)
intel_dpt_suspend(dev_priv);
i915_ggtt_suspend(to_gt(dev_priv)->ggtt);
i915_save_display(dev_priv);
i9xx_display_sr_save(dev_priv);
opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold;
intel_opregion_suspend(display, opregion_target_state);
@@ -1173,7 +1173,7 @@ static int i915_drm_resume(struct drm_device *dev)
intel_dmc_resume(display);
i915_restore_display(dev_priv);
i9xx_display_sr_restore(dev_priv);
intel_vga_redisable(display);

135
drivers/gpu/drm/i915/i915_suspend.c
View File

@@ -1,135 +0,0 @@
/*
*
* Copyright 2008 (c) Intel Corporation
* Jesse Barnes <jbarnes@virtuousgeek.org>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "display/intel_de.h"
#include "display/intel_gmbus.h"
#include "i915_drv.h"
#include "i915_reg.h"
#include "i915_suspend.h"
#include "intel_pci_config.h"
static void intel_save_swf(struct drm_i915_private *dev_priv)
{
int i;
/* Scratch space */
if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
for (i = 0; i < 7; i++) {
dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv,
SWF0(dev_priv, i));
dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv,
SWF1(dev_priv, i));
}
for (i = 0; i < 3; i++)
dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv,
SWF3(dev_priv, i));
} else if (GRAPHICS_VER(dev_priv) == 2) {
for (i = 0; i < 7; i++)
dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv,
SWF1(dev_priv, i));
} else if (HAS_GMCH(dev_priv)) {
for (i = 0; i < 16; i++) {
dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv,
SWF0(dev_priv, i));
dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv,
SWF1(dev_priv, i));
}
for (i = 0; i < 3; i++)
dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv,
SWF3(dev_priv, i));
}
}
static void intel_restore_swf(struct drm_i915_private *dev_priv)
{
int i;
/* Scratch space */
if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
for (i = 0; i < 7; i++) {
intel_de_write(dev_priv, SWF0(dev_priv, i),
dev_priv->regfile.saveSWF0[i]);
intel_de_write(dev_priv, SWF1(dev_priv, i),
dev_priv->regfile.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(dev_priv, SWF3(dev_priv, i),
dev_priv->regfile.saveSWF3[i]);
} else if (GRAPHICS_VER(dev_priv) == 2) {
for (i = 0; i < 7; i++)
intel_de_write(dev_priv, SWF1(dev_priv, i),
dev_priv->regfile.saveSWF1[i]);
} else if (HAS_GMCH(dev_priv)) {
for (i = 0; i < 16; i++) {
intel_de_write(dev_priv, SWF0(dev_priv, i),
dev_priv->regfile.saveSWF0[i]);
intel_de_write(dev_priv, SWF1(dev_priv, i),
dev_priv->regfile.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(dev_priv, SWF3(dev_priv, i),
dev_priv->regfile.saveSWF3[i]);
}
}
void i915_save_display(struct drm_i915_private *dev_priv)
{
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
if (!HAS_DISPLAY(dev_priv))
return;
/* Display arbitration control */
if (GRAPHICS_VER(dev_priv) <= 4)
dev_priv->regfile.saveDSPARB = intel_de_read(dev_priv,
DSPARB(dev_priv));
if (GRAPHICS_VER(dev_priv) == 4)
pci_read_config_word(pdev, GCDGMBUS,
&dev_priv->regfile.saveGCDGMBUS);
intel_save_swf(dev_priv);
}
void i915_restore_display(struct drm_i915_private *dev_priv)
{
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
if (!HAS_DISPLAY(dev_priv))
return;
intel_restore_swf(dev_priv);
if (GRAPHICS_VER(dev_priv) == 4)
pci_write_config_word(pdev, GCDGMBUS,
dev_priv->regfile.saveGCDGMBUS);
/* Display arbitration */
if (GRAPHICS_VER(dev_priv) <= 4)
intel_de_write(dev_priv, DSPARB(dev_priv),
dev_priv->regfile.saveDSPARB);
}

14
drivers/gpu/drm/i915/i915_suspend.h
View File

@@ -1,14 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __I915_SUSPEND_H__
#define __I915_SUSPEND_H__
struct drm_i915_private;
void i915_save_display(struct drm_i915_private *i915);
void i915_restore_display(struct drm_i915_private *i915);
#endif /* __I915_SUSPEND_H__ */