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rtw89: 8852c: process logic efuse map
Add a struct to access logic efuse map, and fill data according to the map. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220307060457.56789-14-pkshih@realtek.com
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@@ -221,6 +221,72 @@ static int rtw8852c_pwr_off_func(struct rtw89_dev *rtwdev)
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return 0;
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}
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static void rtw8852c_e_efuse_parsing(struct rtw89_efuse *efuse,
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struct rtw8852c_efuse *map)
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{
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ether_addr_copy(efuse->addr, map->e.mac_addr);
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efuse->rfe_type = map->rfe_type;
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efuse->xtal_cap = map->xtal_k;
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}
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static void rtw8852c_efuse_parsing_tssi(struct rtw89_dev *rtwdev,
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struct rtw8852c_efuse *map)
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{
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struct rtw89_tssi_info *tssi = &rtwdev->tssi;
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struct rtw8852c_tssi_offset *ofst[] = {&map->path_a_tssi, &map->path_b_tssi};
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u8 *bw40_1s_tssi_6g_ofst[] = {map->bw40_1s_tssi_6g_a, map->bw40_1s_tssi_6g_b};
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u8 i, j;
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tssi->thermal[RF_PATH_A] = map->path_a_therm;
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tssi->thermal[RF_PATH_B] = map->path_b_therm;
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for (i = 0; i < RF_PATH_NUM_8852C; i++) {
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memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi,
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sizeof(ofst[i]->cck_tssi));
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for (j = 0; j < TSSI_CCK_CH_GROUP_NUM; j++)
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rtw89_debug(rtwdev, RTW89_DBG_TSSI,
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"[TSSI][EFUSE] path=%d cck[%d]=0x%x\n",
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i, j, tssi->tssi_cck[i][j]);
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memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi,
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sizeof(ofst[i]->bw40_tssi));
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memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM,
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ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g));
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memcpy(tssi->tssi_6g_mcs[i], bw40_1s_tssi_6g_ofst[i],
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sizeof(tssi->tssi_6g_mcs[i]));
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for (j = 0; j < TSSI_MCS_CH_GROUP_NUM; j++)
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rtw89_debug(rtwdev, RTW89_DBG_TSSI,
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"[TSSI][EFUSE] path=%d mcs[%d]=0x%x\n",
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i, j, tssi->tssi_mcs[i][j]);
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}
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}
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static int rtw8852c_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map)
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{
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struct rtw89_efuse *efuse = &rtwdev->efuse;
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struct rtw8852c_efuse *map;
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map = (struct rtw8852c_efuse *)log_map;
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efuse->country_code[0] = map->country_code[0];
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efuse->country_code[1] = map->country_code[1];
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rtw8852c_efuse_parsing_tssi(rtwdev, map);
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switch (rtwdev->hci.type) {
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case RTW89_HCI_TYPE_PCIE:
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rtw8852c_e_efuse_parsing(efuse, map);
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break;
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default:
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return -ENOTSUPP;
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}
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rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type);
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return 0;
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}
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static void rtw8852c_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map)
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{
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struct rtw89_tssi_info *tssi = &rtwdev->tssi;
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@@ -376,6 +442,7 @@ static void rtw8852c_power_trim(struct rtw89_dev *rtwdev)
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}
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static const struct rtw89_chip_ops rtw8852c_chip_ops = {
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.read_efuse = rtw8852c_read_efuse,
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.read_phycap = rtw8852c_read_phycap,
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.power_trim = rtw8852c_power_trim,
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.pwr_on_func = rtw8852c_pwr_on_func,
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@@ -9,6 +9,68 @@
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#define RF_PATH_NUM_8852C 2
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struct rtw8852c_u_efuse {
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u8 rsvd[0x38];
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u8 mac_addr[ETH_ALEN];
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};
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struct rtw8852c_e_efuse {
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u8 mac_addr[ETH_ALEN];
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};
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struct rtw8852c_tssi_offset {
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u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM];
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u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM];
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u8 rsvd[7];
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u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM];
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} __packed;
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struct rtw8852c_efuse {
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u8 rsvd[0x210];
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struct rtw8852c_tssi_offset path_a_tssi;
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u8 rsvd1[10];
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struct rtw8852c_tssi_offset path_b_tssi;
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u8 rsvd2[94];
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u8 channel_plan;
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u8 xtal_k;
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u8 rsvd3;
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u8 iqk_lck;
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u8 rsvd4[5];
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u8 reg_setting:2;
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u8 tx_diversity:1;
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u8 rx_diversity:2;
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u8 ac_mode:1;
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u8 module_type:2;
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u8 rsvd5;
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u8 shared_ant:1;
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u8 coex_type:3;
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u8 ant_iso:1;
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u8 radio_on_off:1;
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u8 rsvd6:2;
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u8 eeprom_version;
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u8 customer_id;
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u8 tx_bb_swing_2g;
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u8 tx_bb_swing_5g;
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u8 tx_cali_pwr_trk_mode;
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u8 trx_path_selection;
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u8 rfe_type;
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u8 country_code[2];
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u8 rsvd7[3];
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u8 path_a_therm;
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u8 path_b_therm;
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u8 rsvd8[46];
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u8 bw40_1s_tssi_6g_a[TSSI_MCS_6G_CH_GROUP_NUM];
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u8 rsvd9[10];
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u8 bw40_1s_tssi_6g_b[TSSI_MCS_6G_CH_GROUP_NUM];
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u8 rsvd10[110];
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u8 channel_plan_6g;
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u8 rsvd11[71];
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union {
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struct rtw8852c_u_efuse u;
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struct rtw8852c_e_efuse e;
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};
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} __packed;
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extern const struct rtw89_chip_info rtw8852c_chip_info;
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#endif
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