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drm/ast: Gen1: Fix open-coded register access

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Replace all open-coded access to MCR registers in Gen1 with the
appropriate calls to ast_moutdwm() and ast_mindwm(). Use MCR register
constants.

For the poll loop on MCR100, add ast_moutdwm_poll(). The helper polls
the register until it has been updated to the given value. Relax the
CPU while busy-waiting.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patch.msgid.link/20260327133532.79696-11-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann
2026-03-27 14:33:02 +01:00
parent 5e9ced3d6c
commit d467bcab7b
4 changed files with 22 additions and 11 deletions
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18
drivers/gpu/drm/ast/ast_2000.c
View File

@@ -99,20 +99,15 @@ static const struct ast_dramstruct ast2000_dram_table_data[] = {
static void ast_post_chip_2000(struct ast_device *ast)
{
u8 j;
u32 temp, i;
const struct ast_dramstruct *dram_reg_info;
u32 i;
j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff);
if ((j & 0x80) == 0) { /* VGA only */
dram_reg_info = ast2000_dram_table_data;
ast_write32(ast, 0xf004, AST_REG_MCR00);
ast_write32(ast, 0xf000, 0x1);
ast_write32(ast, 0x10100, 0xa8);
const struct ast_dramstruct *dram_reg_info = ast2000_dram_table_data;
u32 mcr140;
do {
;
} while (ast_read32(ast, 0x10100) != 0xa8);
ast_moutdwm_poll(ast, AST_REG_MCR100, 0xa8, 0xa8);
while (!AST_DRAMSTRUCT_IS(dram_reg_info, INVALID)) {
if (AST_DRAMSTRUCT_IS(dram_reg_info, UDELAY)) {
@@ -124,8 +119,9 @@ static void ast_post_chip_2000(struct ast_device *ast)
dram_reg_info++;
}
temp = ast_read32(ast, 0x10140);
ast_write32(ast, 0x10140, temp | 0x40);
mcr140 = ast_mindwm(ast, AST_REG_MCR140);
mcr140 |= 0x00000040;
ast_moutdwm(ast, AST_REG_MCR140, mcr140);
}
/* wait ready */

12
drivers/gpu/drm/ast/ast_drv.c
View File

@@ -102,6 +102,18 @@ void ast_moutdwm(struct ast_device *ast, u32 r, u32 v)
__ast_moutdwm(ast->regs, r, v);
}
void ast_moutdwm_poll(struct ast_device *ast, u32 r, u32 v, u32 res)
{
void __iomem *regs = ast->regs;
__ast_selseg(regs, r);
__ast_wrseg32(regs, r, v);
do {
cpu_relax();
} while (__ast_rdseg32(regs, r) != res);
}
/*
* AST device
*/

1
drivers/gpu/drm/ast/ast_drv.h
View File

@@ -361,6 +361,7 @@ u32 __ast_mindwm(void __iomem *regs, u32 r);
void __ast_moutdwm(void __iomem *regs, u32 r, u32 v);
u32 ast_mindwm(struct ast_device *ast, u32 r);
void ast_moutdwm(struct ast_device *ast, u32 r, u32 v);
void ast_moutdwm_poll(struct ast_device *ast, u32 r, u32 v, u32 res);
/*
* VBIOS

2
drivers/gpu/drm/ast/ast_reg.h
View File

@@ -140,8 +140,10 @@
#define AST_REG_MCR80 AST_REG_MCR(0x80)
#define AST_REG_MCR84 AST_REG_MCR(0x84)
#define AST_REG_MCR88 AST_REG_MCR(0x88)
#define AST_REG_MCR100 AST_REG_MCR(0x100)
#define AST_REG_MCR108 AST_REG_MCR(0x108)
#define AST_REG_MCR120 AST_REG_MCR(0x120)
#define AST_REG_MCR140 AST_REG_MCR(0x140)
#define AST_REG_MCR200 AST_REG_MCR(0x200)
#define AST_REG_MCR204 AST_REG_MCR(0x204)
#define AST_REG_MCR208 AST_REG_MCR(0x208)