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arm64: dts: qcom: qcs8300: Add capacity and DPC properties

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The "capacity-dmips-mhz" and "dynamic-power-coefficient" are used to
build Energy Model which in turn is used by EAS to take placement
decisions. So add it to QCS8300 SoC.

Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241206-qcs8300_dpc-v1-1-af2e8e6d3da9@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Jingyi Wang
2024-12-06 14:41:13 +08:00
committed by Bjorn Andersson
parent 82db707eb9
commit ce4b3c48e4
1 changed files with 16 additions and 0 deletions
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16
arch/arm64/boot/dts/qcom/qcs8300.dtsi
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@@ -45,6 +45,8 @@ cpu0: cpu@0 {
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd0>;
power-domain-names = "psci";
capacity-dmips-mhz = <1946>;
dynamic-power-coefficient = <472>;
l2_0: l2-cache {
compatible = "cache";
@@ -62,6 +64,8 @@ cpu1: cpu@100 {
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd1>;
power-domain-names = "psci";
capacity-dmips-mhz = <1946>;
dynamic-power-coefficient = <472>;
l2_1: l2-cache {
compatible = "cache";
@@ -79,6 +83,8 @@ cpu2: cpu@200 {
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd2>;
power-domain-names = "psci";
capacity-dmips-mhz = <1946>;
dynamic-power-coefficient = <507>;
l2_2: l2-cache {
compatible = "cache";
@@ -96,6 +102,8 @@ cpu3: cpu@300 {
next-level-cache = <&l2_3>;
power-domains = <&cpu_pd3>;
power-domain-names = "psci";
capacity-dmips-mhz = <1946>;
dynamic-power-coefficient = <507>;
l2_3: l2-cache {
compatible = "cache";
@@ -113,6 +121,8 @@ cpu4: cpu@10000 {
next-level-cache = <&l2_4>;
power-domains = <&cpu_pd4>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
l2_4: l2-cache {
compatible = "cache";
@@ -130,6 +140,8 @@ cpu5: cpu@10100 {
next-level-cache = <&l2_5>;
power-domains = <&cpu_pd5>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
l2_5: l2-cache {
compatible = "cache";
@@ -147,6 +159,8 @@ cpu6: cpu@10200 {
next-level-cache = <&l2_6>;
power-domains = <&cpu_pd6>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
l2_6: l2-cache {
compatible = "cache";
@@ -164,6 +178,8 @@ cpu7: cpu@10300 {
next-level-cache = <&l2_7>;
power-domains = <&cpu_pd7>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
l2_7: l2-cache {
compatible = "cache";