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arm64: dts: qcom: qcs615: Add CPU capacity and DPC properties

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Add "capacity-dmips-mhz" and "dynamic-power-coefficient" to the QCS615 SoC.
They are used to build the energy model, which in turn is used by EAS to
take placement decisions.

Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241211-add_cpu_capacity_and_dpc_properties-v1-1-03aaee023a77@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Lijuan Gao
2024-12-11 17:35:46 +08:00
committed by Bjorn Andersson
parent 5f440a7b00
commit 82db707eb9
1 changed files with 16 additions and 0 deletions
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16
arch/arm64/boot/dts/qcom/qcs615.dtsi
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@@ -29,6 +29,8 @@ cpu0: cpu@0 {
enable-method = "psci";
power-domains = <&cpu_pd0>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_0>;
#cooling-cells = <2>;
@@ -47,6 +49,8 @@ cpu1: cpu@100 {
enable-method = "psci";
power-domains = <&cpu_pd1>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_100>;
l2_100: l2-cache {
@@ -64,6 +68,8 @@ cpu2: cpu@200 {
enable-method = "psci";
power-domains = <&cpu_pd2>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_200>;
l2_200: l2-cache {
@@ -81,6 +87,8 @@ cpu3: cpu@300 {
enable-method = "psci";
power-domains = <&cpu_pd3>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_300>;
l2_300: l2-cache {
@@ -98,6 +106,8 @@ cpu4: cpu@400 {
enable-method = "psci";
power-domains = <&cpu_pd4>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_400>;
l2_400: l2-cache {
@@ -115,6 +125,8 @@ cpu5: cpu@500 {
enable-method = "psci";
power-domains = <&cpu_pd5>;
power-domain-names = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_500>;
l2_500: l2-cache {
@@ -132,6 +144,8 @@ cpu6: cpu@600 {
enable-method = "psci";
power-domains = <&cpu_pd6>;
power-domain-names = "psci";
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <404>;
next-level-cache = <&l2_600>;
#cooling-cells = <2>;
@@ -150,6 +164,8 @@ cpu7: cpu@700 {
enable-method = "psci";
power-domains = <&cpu_pd7>;
power-domain-names = "psci";
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <404>;
next-level-cache = <&l2_700>;
l2_700: l2-cache {