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Merge tag 'v3.18-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Browse Source 
Pull "First hunk of Rockchip dts changes for 3.18" from Heiko Stuebner:

- dw_mmc conversion from Jaehoon Chung
- mmc support for rk3288
- pwm + backlight for rk3288
- rtc for Radxa Rock
- saradc base nodes

* tag 'v3.18-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add saradc nodes
  ARM: dts: rockchip: add hym8563 rtc to Radxa Rock board
  ARM: dts: Enable PWM backlight on rk3288-evb
  ARM: dts: Add main PWM info to rk3288
  ARM: dts: Move the PMIC interrupt pinctrl line to rk3288-evb common
  ARM: dts: Enable emmc and sdmmc on the rk3288-evb boards
  ARM: dts: Add emmc and sdmmc to the rk3288 device tree
  ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2014-09-04 21:58:03 +02:00
parent 7d1311b93e f23a6179d4
commit c30131cf20
6 changed files with 215 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
arch/arm/boot/dts/rk3066a-bqcurie2.dts
View File

@@ -150,12 +150,8 @@ &mmc0 { /* sdmmc */
num-slots = <1>;
status = "okay";
vmmc-supply = <&vcc_sd0>;
slot@0 {
reg = <0>;
bus-width = <4>;
disable-wp;
};
bus-width = <4>;
disable-wp;
};
&mmc1 { /* wifi */
@@ -166,11 +162,8 @@ &mmc1 { /* wifi */
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
slot@0 {
reg = <0>;
bus-width = <4>;
disable-wp;
};
bus-width = <4>;
disable-wp;
};
&uart0 {

24
arch/arm/boot/dts/rk3188-radxarock.dts
View File

@@ -80,6 +80,17 @@ &i2c1 {
status = "okay";
clock-frequency = <400000>;
rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
interrupt-parent = <&gpio0>;
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_int>;
#clock-cells = <0>;
clock-output-names = "xin32k";
};
act8846: act8846@5a {
compatible = "active-semi,act8846";
reg = <0x5a>;
@@ -181,11 +192,8 @@ &mmc0 {
status = "okay";
vmmc-supply = <&vcc_sd0>;
slot@0 {
reg = <0>;
bus-width = <4>;
disable-wp;
};
bus-width = <4>;
disable-wp;
};
&pinctrl {
@@ -199,6 +207,12 @@ act8846_dvs0_ctl: act8846-dvs0-ctl {
};
};
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
ir-receiver {
ir_recv_pin: ir-recv-pin {
rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;

10
arch/arm/boot/dts/rk3288-evb-act8846.dts
View File

@@ -26,7 +26,7 @@ hym8563@51 {
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
pinctrl-0 = <&pmic_int>;
#clock-cells = <0>;
clock-output-names = "xin32k";
@@ -124,11 +124,3 @@ vcc18_lcd: REG12 {
};
};
};
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

83
arch/arm/boot/dts/rk3288-evb.dtsi
View File

@@ -10,6 +10,7 @@
* GNU General Public License for more details.
*/
#include <dt-bindings/pwm/pwm.h>
#include "rk3288.dtsi"
/ {
@@ -17,6 +18,48 @@ memory {
reg = <0x0 0x80000000>;
};
backlight {
compatible = "pwm-backlight";
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <128>;
enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
@@ -49,6 +92,30 @@ vcc_host: vcc-host-regulator {
};
};
&emmc {
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp; /* wp not hooked up */
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "okay";
};
&i2c0 {
status = "okay";
};
@@ -57,6 +124,10 @@ &wdt {
status = "okay";
};
&pwm0 {
status = "okay";
};
&uart0 {
status = "okay";
};
@@ -78,12 +149,24 @@ &uart4 {
};
&pinctrl {
backlight {
bl_en: bl-en {
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;

98
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -78,6 +78,36 @@ timer {
clock-frequency = <24000000>;
};
sdmmc: dwmmc@ff0c0000 {
compatible = "rockchip,rk3288-dw-mshc";
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
clock-names = "biu", "ciu";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xff0c0000 0x4000>;
status = "disabled";
};
emmc: dwmmc@ff0f0000 {
compatible = "rockchip,rk3288-dw-mshc";
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
clock-names = "biu", "ciu";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xff0f0000 0x4000>;
status = "disabled";
};
saradc: saradc@ff100000 {
compatible = "rockchip,saradc";
reg = <0xff100000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk";
status = "disabled";
};
i2c1: i2c@ff140000 {
compatible = "rockchip,rk3288-i2c";
reg = <0xff140000 0x1000>;
@@ -241,6 +271,50 @@ i2c2: i2c@ff660000 {
status = "disabled";
};
pwm0: pwm@ff680000 {
compatible = "rockchip,rk3288-pwm";
reg = <0xff680000 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
status = "disabled";
};
pwm1: pwm@ff680010 {
compatible = "rockchip,rk3288-pwm";
reg = <0xff680010 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
status = "disabled";
};
pwm2: pwm@ff680020 {
compatible = "rockchip,rk3288-pwm";
reg = <0xff680020 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
status = "disabled";
};
pwm3: pwm@ff680030 {
compatible = "rockchip,rk3288-pwm";
reg = <0xff680030 0x10>;
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
status = "disabled";
};
pmu: power-management@ff730000 {
compatible = "rockchip,rk3288-pmu", "syscon";
reg = <0xff730000 0x100>;
@@ -591,5 +665,29 @@ uart4_rts: uart4-rts {
rockchip,pins = <5 15 3 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
rockchip,pins = <7 22 3 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_pin: pwm3-pin {
rockchip,pins = <7 23 3 &pcfg_pull_none>;
};
};
};
};

10
arch/arm/boot/dts/rk3xxx.dtsi
View File

@@ -264,4 +264,14 @@ uart3: serial@20068000 {
clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
status = "disabled";
};
saradc: saradc@2006c000 {
compatible = "rockchip,saradc";
reg = <0x2006c000 0x100>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk";
status = "disabled";
};
};