From 356649ab6d6412b256a2ff789e50ddbe5d78aaec Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Thu, 7 Aug 2014 16:38:02 +0900 Subject: [PATCH 1/8] ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc dw-mmc controller can support multiple slots. But, there are no use-cases anywhere. So we don't need to support the slot-node for dw-mmc controller. And "supports-highspeed" property in dw-mmc is deprecated. "supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed". Signed-off-by: Jaehoon Chung Reviewed-by: Tushar Behera Reviewed-by: Ulf Hansson Reviewed-by: Heiko Stuebner Acked-by: Seungwon Jeon Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 15 ++++----------- arch/arm/boot/dts/rk3188-radxarock.dts | 7 ++----- 2 files changed, 6 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts index 042f821d9e4d..665dd56f4f79 100644 --- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts +++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts @@ -150,12 +150,8 @@ &mmc0 { /* sdmmc */ num-slots = <1>; status = "okay"; vmmc-supply = <&vcc_sd0>; - - slot@0 { - reg = <0>; - bus-width = <4>; - disable-wp; - }; + bus-width = <4>; + disable-wp; }; &mmc1 { /* wifi */ @@ -166,11 +162,8 @@ &mmc1 { /* wifi */ pinctrl-names = "default"; pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>; - slot@0 { - reg = <0>; - bus-width = <4>; - disable-wp; - }; + bus-width = <4>; + disable-wp; }; &uart0 { diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index 171b610db709..ef72faf9059a 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -181,11 +181,8 @@ &mmc0 { status = "okay"; vmmc-supply = <&vcc_sd0>; - slot@0 { - reg = <0>; - bus-width = <4>; - disable-wp; - }; + bus-width = <4>; + disable-wp; }; &pinctrl { From 85095bf30f028f6dcb7d8177ab9b00425c11ca58 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Tue, 12 Aug 2014 16:21:13 -0700 Subject: [PATCH 2/8] ARM: dts: Add emmc and sdmmc to the rk3288 device tree This adds support for the sdmmc and emmc ports on the rk3288. Signed-off-by: Doug Anderson Acked-by: Arnd Bergmann Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 5950b0a53224..36be7bb55a01 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -78,6 +78,26 @@ timer { clock-frequency = <24000000>; }; + sdmmc: dwmmc@ff0c0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0c0000 0x4000>; + status = "disabled"; + }; + + emmc: dwmmc@ff0f0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0f0000 0x4000>; + status = "disabled"; + }; + i2c1: i2c@ff140000 { compatible = "rockchip,rk3288-i2c"; reg = <0xff140000 0x1000>; From 2c31d9498cb85dcf37806237870e8ccf4dbf84e0 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Tue, 12 Aug 2014 16:21:14 -0700 Subject: [PATCH 3/8] ARM: dts: Enable emmc and sdmmc on the rk3288-evb boards This enables basic SD and eMMC support. Things are not yet running at the fastest speed and we don't have the regulators specified, but we can at least use the eMMC and SD cards now. A note: * Though MMC DDR50 mode is partially supported in the dw_mmc rk3288-specific code in Addy's patch, Addy's patch doesn't add tuning support. That means DDR50 mode is not reliable. From the 3288 TRM: "Tuning is required for other speed modes-such as DDR50-even though the output delay from the card is less than one cycle." Thus, we don't enable MMC DDR50 mode in this patch. Signed-off-by: Doug Anderson Acked-by: Arnd Bergmann Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 4f572093c8b4..ebce49a66a12 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -49,6 +49,30 @@ vcc_host: vcc-host-regulator { }; }; +&emmc { + broken-cd; + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; /* wp not hooked up */ + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; +}; + &i2c0 { status = "okay"; }; From 91ff8cd8c3aae34a26b517506cc1ff809401a490 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Mon, 11 Aug 2014 11:47:29 -0700 Subject: [PATCH 4/8] ARM: dts: Move the PMIC interrupt pinctrl line to rk3288-evb common The PMIC interrupt pinctrl line was added to the rk3288-evb-act8846, but it's the same line on both the ACT8846 version and the RK808 version. This makes a lot of sense since they share the same SoC daugherboard. Move the pinctrl definition to the common file so we can use it for the RK808 version. NOTE: The PMIC interrupt doesn't _actually_ go to the PMIC on the ACT8846 version of the board (it does on the RK808), but our convention is to label things as they're labelled on the schematics. In the very least you can argue that this is the interrupt from the PMIC daughtercard even if it doesn't actually go to the PMIC chip. Signed-off-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb-act8846.dts | 10 +--------- arch/arm/boot/dts/rk3288-evb.dtsi | 6 ++++++ 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts index 7d59ff4de408..a76dd44adb53 100644 --- a/arch/arm/boot/dts/rk3288-evb-act8846.dts +++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts @@ -26,7 +26,7 @@ hym8563@51 { interrupts = <4 IRQ_TYPE_EDGE_FALLING>; pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; + pinctrl-0 = <&pmic_int>; #clock-cells = <0>; clock-output-names = "xin32k"; @@ -124,11 +124,3 @@ vcc18_lcd: REG12 { }; }; }; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = ; - }; - }; -}; diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index ebce49a66a12..2964370aed90 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -108,6 +108,12 @@ pwrbtn: pwrbtn { }; }; + pmic { + pmic_int: pmic-int { + rockchip,pins = ; + }; + }; + usb { host_vbus_drv: host-vbus-drv { rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; From df542df3f572af7e5f8279e78d86614483d9670d Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Mon, 25 Aug 2014 15:59:26 -0700 Subject: [PATCH 5/8] ARM: dts: Add main PWM info to rk3288 This adds the PWM info (other than the VOP PWM) to the main rk3288 dtsi file. Signed-off-by: Caesar Wang Signed-off-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 68 +++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 36be7bb55a01..7342b2453d6f 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -261,6 +261,50 @@ i2c2: i2c@ff660000 { status = "disabled"; }; + pwm0: pwm@ff680000 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680000 0x10>; + #pwm-cells = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + + pwm1: pwm@ff680010 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680010 0x10>; + #pwm-cells = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + + pwm2: pwm@ff680020 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680020 0x10>; + #pwm-cells = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm2_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + + pwm3: pwm@ff680030 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680030 0x10>; + #pwm-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + pmu: power-management@ff730000 { compatible = "rockchip,rk3288-pmu", "syscon"; reg = <0xff730000 0x100>; @@ -611,5 +655,29 @@ uart4_rts: uart4-rts { rockchip,pins = <5 15 3 &pcfg_pull_none>; }; }; + + pwm0 { + pwm0_pin: pwm0-pin { + rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm1 { + pwm1_pin: pwm1-pin { + rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm2 { + pwm2_pin: pwm2-pin { + rockchip,pins = <7 22 3 &pcfg_pull_none>; + }; + }; + + pwm3 { + pwm3_pin: pwm3-pin { + rockchip,pins = <7 23 3 &pcfg_pull_none>; + }; + }; }; }; From 0541f94fdff89fb7bc14bf5fe0da21d9d19a0c6d Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Mon, 25 Aug 2014 15:59:27 -0700 Subject: [PATCH 6/8] ARM: dts: Enable PWM backlight on rk3288-evb PWM0 is the PWM associated with the LCD backlight. Enable it. Signed-off-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb.dtsi | 53 +++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 2964370aed90..98b69d017de9 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -10,6 +10,7 @@ * GNU General Public License for more details. */ +#include #include "rk3288.dtsi" / { @@ -17,6 +18,48 @@ memory { reg = <0x0 0x80000000>; }; + backlight { + compatible = "pwm-backlight"; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <128>; + enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en>; + pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>; + }; + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; @@ -81,6 +124,10 @@ &wdt { status = "okay"; }; +&pwm0 { + status = "okay"; +}; + &uart0 { status = "okay"; }; @@ -102,6 +149,12 @@ &uart4 { }; &pinctrl { + backlight { + bl_en: bl-en { + rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + buttons { pwrbtn: pwrbtn { rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; From 4721ab855d1a1d3e472ff38d1cae06e23e0520cf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Heiko=20St=C3=BCbner?= Date: Wed, 20 Aug 2014 21:07:22 +0200 Subject: [PATCH 7/8] ARM: dts: rockchip: add hym8563 rtc to Radxa Rock board The Radxa Rock uses a hym8563 as rtc. Add the i2c device and necessary pinconfig for the interrupt pin - labeled rtc_int in the schematics. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188-radxarock.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index ef72faf9059a..ff35acfa8ae7 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -80,6 +80,17 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + #clock-cells = <0>; + clock-output-names = "xin32k"; + }; + act8846: act8846@5a { compatible = "active-semi,act8846"; reg = <0x5a>; @@ -196,6 +207,12 @@ act8846_dvs0_ctl: act8846-dvs0-ctl { }; }; + hym8563 { + rtc_int: rtc-int { + rockchip,pins = ; + }; + }; + ir-receiver { ir_recv_pin: ir-recv-pin { rockchip,pins = ; From f23a6179d45e9d144bf2eb2bd82b2f1270f85fcf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Heiko=20St=C3=BCbner?= Date: Wed, 20 Aug 2014 21:09:24 +0200 Subject: [PATCH 8/8] ARM: dts: rockchip: add saradc nodes Add the core device nodes for the SARADC found on both the Cortex-A9 series (rk3066 and rk3188) as well as the newer rk3288. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 10 ++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 7342b2453d6f..9eda0973795f 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -98,6 +98,16 @@ emmc: dwmmc@ff0f0000 { status = "disabled"; }; + saradc: saradc@ff100000 { + compatible = "rockchip,saradc"; + reg = <0xff100000 0x100>; + interrupts = ; + #io-channel-cells = <1>; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + status = "disabled"; + }; + i2c1: i2c@ff140000 { compatible = "rockchip,rk3288-i2c"; reg = <0xff140000 0x1000>; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 8caf85d83901..cce4a07d6e04 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -264,4 +264,14 @@ uart3: serial@20068000 { clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; status = "disabled"; }; + + saradc: saradc@2006c000 { + compatible = "rockchip,saradc"; + reg = <0x2006c000 0x100>; + interrupts = ; + #io-channel-cells = <1>; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + status = "disabled"; + }; };