platform/x86: lenovo-wmi-other: Add GPU tunable attributes

Use an enum for all GPU attribute feature ID's and add GPU attributes.

Reviewed-by: Rong Zhang <i@rong.moe>
Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca>
Signed-off-by: Derek J. Clark <derekjohn.clark@gmail.com>
Link: https://patch.msgid.link/20260520060740.119554-3-derekjohn.clark@gmail.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
This commit is contained in:
Derek J. Clark
2026-05-20 06:07:35 +00:00
committed by Ilpo Järvinen
parent a2a893d575
commit b51fa3b00e
3 changed files with 116 additions and 0 deletions

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@@ -69,6 +69,16 @@ Each attribute has the following properties:
The following firmware-attributes are implemented:
- cpu_temp: CPU Thermal Load Limit
- dgpu_boost_clk: Dedicated GPU Boost Clock
- dgpu_didvid: Dedicated GPU Device Identifier and Vendor Identifier
- dgpu_enable: Dedicated GPU Enabled Status
- gpu_mode: GPU Mode by Power Limit
- gpu_nv_ac_offset: Nvidia GPU AC Total Processing Power Baseline Offset
- gpu_nv_bpl: Nvidia GPU Base Power Limit
- gpu_nv_cpu_boost: Nvidia GPU to CPU Dynamic Boost Limit
- gpu_nv_ctgp: Nvidia GPU Configurable Total Graphics Power
- gpu_nv_ppab: Nvidia GPU Power Performance Aware Boost Limit
- gpu_temp: GPU Thermal Load Limit
- ppt_cpu_cl: CPU Cross Loading Power Limit
- ppt_pl1_apu_spl: Platform Profile Tracking APU Sustained Power Limit
- ppt_pl1_spl: Platform Profile Tracking Sustained Power Limit

View File

@@ -20,6 +20,7 @@
enum lwmi_device_id {
LWMI_DEVICE_ID_CPU = 0x01,
LWMI_DEVICE_ID_GPU = 0x02,
LWMI_DEVICE_ID_FAN = 0x04,
};

View File

@@ -62,6 +62,19 @@ enum lwmi_feature_id_cpu {
LWMI_FEATURE_ID_CPU_IPL = 0x09,
};
enum lwmi_feature_id_gpu {
LWMI_FEATURE_ID_GPU_NV_PPAB = 0x01,
LWMI_FEATURE_ID_GPU_NV_CTGP = 0x02,
LWMI_FEATURE_ID_GPU_TEMP = 0x03,
LWMI_FEATURE_ID_GPU_AC_OFFSET = 0x04,
LWMI_FEATURE_ID_DGPU_BOOST_CLK = 0x06,
LWMI_FEATURE_ID_DGPU_EN = 0x07,
LWMI_FEATURE_ID_GPU_MODE = 0x08,
LWMI_FEATURE_ID_DGPU_DIDVID = 0x09,
LWMI_FEATURE_ID_GPU_NV_BPL = 0x0a,
LWMI_FEATURE_ID_GPU_NV_CPU_BOOST = 0x0b,
};
#define LWMI_FEATURE_ID_FAN_RPM 0x03
#define LWMI_TYPE_ID_CROSSLOAD 0x01
@@ -639,6 +652,66 @@ static struct tunable_attr_01 ppt_pl4_ipl_cl = {
.type_id = LWMI_TYPE_ID_CROSSLOAD,
};
static struct tunable_attr_01 gpu_nv_ppab = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_GPU_NV_PPAB,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 gpu_nv_ctgp = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_GPU_NV_CTGP,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 gpu_temp = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_GPU_TEMP,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 gpu_nv_ac_offset = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_GPU_AC_OFFSET,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 dgpu_boost_clk = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_DGPU_BOOST_CLK,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 dgpu_enable = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_DGPU_EN,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 gpu_mode = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_GPU_MODE,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 dgpu_didvid = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_DGPU_DIDVID,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 gpu_nv_bpl = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_GPU_NV_BPL,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 gpu_nv_cpu_boost = {
.device_id = LWMI_DEVICE_ID_GPU,
.feature_id = LWMI_FEATURE_ID_GPU_NV_CPU_BOOST,
.type_id = LWMI_TYPE_ID_NONE,
};
struct capdata01_attr_group {
const struct attribute_group *attr_group;
struct tunable_attr_01 *tunable_attr;
@@ -974,6 +1047,7 @@ static bool lwmi_attr_01_is_supported(struct tunable_attr_01 *tunable_attr)
.name = _fsname, .attrs = _attrname##_attrs \
}
/* CPU tunable attributes */
LWMI_ATTR_GROUP_TUNABLE_CAP01(cpu_temp, "cpu_temp",
"Set the CPU thermal load limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_cpu_cl, "ppt_cpu_cl",
@@ -999,9 +1073,40 @@ LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl, "ppt_pl4_ipl",
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl_cl, "ppt_pl4_ipl_cl",
"Set the CPU cross loading instantaneous power limit");
/* GPU tunable attributes */
LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_boost_clk, "dgpu_boost_clk",
"Set the dedicated GPU boost clock");
LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_didvid, "dgpu_didvid",
"Get the GPU device identifier and vendor identifier");
LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_enable, "dgpu_enable",
"Set the dedicated Nvidia GPU enabled status");
LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_mode, "gpu_mode",
"Set the GPU mode by power limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ac_offset, "gpu_nv_ac_offset",
"Set the Nvidia GPU AC total processing power baseline offset");
LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_bpl, "gpu_nv_bpl",
"Set the Nvidia GPU base power limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_cpu_boost, "gpu_nv_cpu_boost",
"Set the Nvidia GPU to CPU dynamic boost limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ctgp, "gpu_nv_ctgp",
"Set the GPU configurable total graphics power");
LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ppab, "gpu_nv_ppab",
"Set the Nvidia GPU power performance aware boost limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_temp, "gpu_temp",
"Set the GPU thermal load limit");
static struct capdata01_attr_group cd01_attr_groups[] = {
{ &cpu_temp_attr_group, &cpu_temp },
{ &dgpu_boost_clk_attr_group, &dgpu_boost_clk },
{ &dgpu_didvid_attr_group, &dgpu_didvid },
{ &dgpu_enable_attr_group, &dgpu_enable },
{ &gpu_mode_attr_group, &gpu_mode },
{ &gpu_nv_ac_offset_attr_group, &gpu_nv_ac_offset },
{ &gpu_nv_bpl_attr_group, &gpu_nv_bpl },
{ &gpu_nv_cpu_boost_attr_group, &gpu_nv_cpu_boost },
{ &gpu_nv_ctgp_attr_group, &gpu_nv_ctgp },
{ &gpu_nv_ppab_attr_group, &gpu_nv_ppab },
{ &gpu_temp_attr_group, &gpu_temp },
{ &ppt_cpu_cl_attr_group, &ppt_cpu_cl },
{ &ppt_pl1_apu_spl_attr_group, &ppt_pl1_apu_spl },
{ &ppt_pl1_spl_attr_group, &ppt_pl1_spl },