platform/x86: lenovo-wmi-other: Add missing CPU tunable attributes

Use an enum for all device ID's and CPU attribute feature ID's,
add missing CPU attributes.

Reviewed-by: Rong Zhang <i@rong.moe>
Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca>
Signed-off-by: Derek J. Clark <derekjohn.clark@gmail.com>
Link: https://patch.msgid.link/20260520060740.119554-2-derekjohn.clark@gmail.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
This commit is contained in:
Derek J. Clark
2026-05-20 06:07:34 +00:00
committed by Ilpo Järvinen
parent 1ab843135a
commit a2a893d575
3 changed files with 107 additions and 6 deletions

View File

@@ -68,9 +68,18 @@ Each attribute has the following properties:
- type
The following firmware-attributes are implemented:
- cpu_temp: CPU Thermal Load Limit
- ppt_cpu_cl: CPU Cross Loading Power Limit
- ppt_pl1_apu_spl: Platform Profile Tracking APU Sustained Power Limit
- ppt_pl1_spl: Platform Profile Tracking Sustained Power Limit
- ppt_pl1_spl_cl: Platform Profile Tracking Cross Loading Sustained Power Limit
- ppt_pl1_tau: Exceed Duration for Platform Profile Tracking Sustained Power Limit
- ppt_pl2_sppt: Platform Profile Tracking Slow Package Power Tracking
- ppt_pl2_sppt_cl: Platform Profile Tracking Cross Loading Slow Package Tracking
- ppt_pl3_fppt: Platform Profile Tracking Fast Package Power Tracking
- ppt_pl3_fppt_cl: Platform Profile Tracking Cross Loading Fast Package Power Tracking
- ppt_pl4_ipl: Platform Profile Tracking Instantaneous Power Limit
- ppt_pl4_ipl_cl: Platform Profile Tracking Cross Loading Instantaneous Power Limit
LENOVO_FAN_TEST_DATA
-------------------------

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@@ -18,7 +18,10 @@
#define LWMI_ATTR_MODE_ID_MASK GENMASK(15, 8)
#define LWMI_ATTR_TYPE_ID_MASK GENMASK(7, 0)
#define LWMI_DEVICE_ID_FAN 0x04
enum lwmi_device_id {
LWMI_DEVICE_ID_CPU = 0x01,
LWMI_DEVICE_ID_FAN = 0x04,
};
#define LWMI_TYPE_ID_NONE 0x00

View File

@@ -51,14 +51,21 @@
#define LENOVO_OTHER_MODE_GUID "DC2A8805-3A8C-41BA-A6F7-092E0089CD3B"
#define LWMI_DEVICE_ID_CPU 0x01
#define LWMI_FEATURE_ID_CPU_SPPT 0x01
#define LWMI_FEATURE_ID_CPU_SPL 0x02
#define LWMI_FEATURE_ID_CPU_FPPT 0x03
enum lwmi_feature_id_cpu {
LWMI_FEATURE_ID_CPU_SPPT = 0x01,
LWMI_FEATURE_ID_CPU_SPL = 0x02,
LWMI_FEATURE_ID_CPU_FPPT = 0x03,
LWMI_FEATURE_ID_CPU_TEMP = 0x04,
LWMI_FEATURE_ID_CPU_APU = 0x05,
LWMI_FEATURE_ID_CPU_CL = 0x06,
LWMI_FEATURE_ID_CPU_TAU = 0x07,
LWMI_FEATURE_ID_CPU_IPL = 0x09,
};
#define LWMI_FEATURE_ID_FAN_RPM 0x03
#define LWMI_TYPE_ID_CROSSLOAD 0x01
#define LWMI_FEATURE_VALUE_GET 17
#define LWMI_FEATURE_VALUE_SET 18
@@ -566,18 +573,72 @@ static struct tunable_attr_01 ppt_pl1_spl = {
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_pl1_spl_cl = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_SPL,
.type_id = LWMI_TYPE_ID_CROSSLOAD,
};
static struct tunable_attr_01 ppt_pl2_sppt = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_SPPT,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_pl2_sppt_cl = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_SPPT,
.type_id = LWMI_TYPE_ID_CROSSLOAD,
};
static struct tunable_attr_01 ppt_pl3_fppt = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_FPPT,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_pl3_fppt_cl = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_FPPT,
.type_id = LWMI_TYPE_ID_CROSSLOAD,
};
static struct tunable_attr_01 cpu_temp = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_TEMP,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_pl1_apu_spl = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_APU,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_cpu_cl = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_CL,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_pl1_tau = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_TAU,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_pl4_ipl = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_IPL,
.type_id = LWMI_TYPE_ID_NONE,
};
static struct tunable_attr_01 ppt_pl4_ipl_cl = {
.device_id = LWMI_DEVICE_ID_CPU,
.feature_id = LWMI_FEATURE_ID_CPU_IPL,
.type_id = LWMI_TYPE_ID_CROSSLOAD,
};
struct capdata01_attr_group {
const struct attribute_group *attr_group;
struct tunable_attr_01 *tunable_attr;
@@ -913,17 +974,45 @@ static bool lwmi_attr_01_is_supported(struct tunable_attr_01 *tunable_attr)
.name = _fsname, .attrs = _attrname##_attrs \
}
LWMI_ATTR_GROUP_TUNABLE_CAP01(cpu_temp, "cpu_temp",
"Set the CPU thermal load limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_cpu_cl, "ppt_cpu_cl",
"Set the CPU cross loading power limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_apu_spl, "ppt_pl1_apu_spl",
"Set the APU sustained power limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_spl, "ppt_pl1_spl",
"Set the CPU sustained power limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_spl_cl, "ppt_pl1_spl_cl",
"Set the CPU cross loading sustained power limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl2_sppt, "ppt_pl2_sppt",
"Set the CPU slow package power tracking limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl2_sppt_cl, "ppt_pl2_sppt_cl",
"Set the CPU cross loading slow package power tracking limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl3_fppt, "ppt_pl3_fppt",
"Set the CPU fast package power tracking limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl3_fppt_cl, "ppt_pl3_fppt_cl",
"Set the CPU cross loading fast package power tracking limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_tau, "ppt_pl1_tau",
"Set the CPU sustained power limit exceed duration");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl, "ppt_pl4_ipl",
"Set the CPU instantaneous power limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl_cl, "ppt_pl4_ipl_cl",
"Set the CPU cross loading instantaneous power limit");
static struct capdata01_attr_group cd01_attr_groups[] = {
{ &cpu_temp_attr_group, &cpu_temp },
{ &ppt_cpu_cl_attr_group, &ppt_cpu_cl },
{ &ppt_pl1_apu_spl_attr_group, &ppt_pl1_apu_spl },
{ &ppt_pl1_spl_attr_group, &ppt_pl1_spl },
{ &ppt_pl1_spl_cl_attr_group, &ppt_pl1_spl_cl },
{ &ppt_pl1_tau_attr_group, &ppt_pl1_tau },
{ &ppt_pl2_sppt_attr_group, &ppt_pl2_sppt },
{ &ppt_pl2_sppt_cl_attr_group, &ppt_pl2_sppt_cl },
{ &ppt_pl3_fppt_attr_group, &ppt_pl3_fppt },
{ &ppt_pl3_fppt_cl_attr_group, &ppt_pl3_fppt_cl },
{ &ppt_pl4_ipl_attr_group, &ppt_pl4_ipl },
{ &ppt_pl4_ipl_cl_attr_group, &ppt_pl4_ipl_cl },
{},
};