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drm/amd/display: add clear_tiling mi callbacks

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This adds clear_tiling callbacks to the mi structure that
will be used for drm panic support to clear the tiling on
a display.  Mem input (mi) is used on DCE based display
IPs.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Lu Yao <yaolu@kylinos.cn>
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Cc: Harry Wentland <harry.wentland@amd.com>
This commit is contained in:
Alex Deucher
2024-10-31 13:20:19 -04:00
parent 1fa5c5a317
commit 98471006ae
2 changed files with 31 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
View File

@@ -481,7 +481,6 @@ static void program_tiling(
}
}
static void program_size_and_rotation(
struct dce_mem_input *dce_mi,
enum dc_rotation_angle rotation,
@@ -627,6 +626,27 @@ static void program_grph_pixel_format(
GRPH_PRESCALE_B_SIGN, sign);
}
static void dce_mi_clear_tiling(
struct mem_input *mi)
{
struct dce_mem_input *dce_mi = TO_DCE_MEM_INPUT(mi);
if (dce_mi->masks->GRPH_SW_MODE) { /* GFX9 */
REG_UPDATE(GRPH_CONTROL,
GRPH_SW_MODE, DC_SW_LINEAR);
}
if (dce_mi->masks->GRPH_MICRO_TILE_MODE) { /* GFX8 */
REG_UPDATE(GRPH_CONTROL,
GRPH_ARRAY_MODE, DC_SW_LINEAR);
}
if (dce_mi->masks->GRPH_ARRAY_MODE) { /* GFX6 but reuses gfx8 struct */
REG_UPDATE(GRPH_CONTROL,
GRPH_ARRAY_MODE, DC_SW_LINEAR);
}
}
static void dce_mi_program_surface_config(
struct mem_input *mi,
enum surface_pixel_format format,
@@ -884,7 +904,8 @@ static const struct mem_input_funcs dce_mi_funcs = {
.mem_input_program_pte_vm = dce_mi_program_pte_vm,
.mem_input_program_surface_config =
dce_mi_program_surface_config,
.mem_input_is_flip_pending = dce_mi_is_flip_pending
.mem_input_is_flip_pending = dce_mi_is_flip_pending,
.mem_input_clear_tiling = dce_mi_clear_tiling,
};
#if defined(CONFIG_DRM_AMD_DC_SI)
@@ -897,7 +918,8 @@ static const struct mem_input_funcs dce60_mi_funcs = {
.mem_input_program_pte_vm = dce_mi_program_pte_vm,
.mem_input_program_surface_config =
dce60_mi_program_surface_config,
.mem_input_is_flip_pending = dce_mi_is_flip_pending
.mem_input_is_flip_pending = dce_mi_is_flip_pending,
.mem_input_clear_tiling = dce_mi_clear_tiling,
};
#endif
@@ -910,7 +932,8 @@ static const struct mem_input_funcs dce112_mi_funcs = {
.mem_input_program_pte_vm = dce_mi_program_pte_vm,
.mem_input_program_surface_config =
dce_mi_program_surface_config,
.mem_input_is_flip_pending = dce_mi_is_flip_pending
.mem_input_is_flip_pending = dce_mi_is_flip_pending,
.mem_input_clear_tiling = dce_mi_clear_tiling,
};
static const struct mem_input_funcs dce120_mi_funcs = {
@@ -922,7 +945,8 @@ static const struct mem_input_funcs dce120_mi_funcs = {
.mem_input_program_pte_vm = dce_mi_program_pte_vm,
.mem_input_program_surface_config =
dce_mi_program_surface_config,
.mem_input_is_flip_pending = dce_mi_is_flip_pending
.mem_input_is_flip_pending = dce_mi_is_flip_pending,
.mem_input_clear_tiling = dce_mi_clear_tiling,
};
void dce_mem_input_construct(

2
drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
View File

@@ -187,6 +187,8 @@ struct mem_input_funcs {
const struct dc_cursor_position *pos,
const struct dc_cursor_mi_param *param);
void (*mem_input_clear_tiling)(
struct mem_input *mem_input);
};
#endif