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arm64: dts: qcom: x1e80100: Enable cpufreq

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Enable cpufreq on X1E80100 SoCs through the SCMI perf protocol node.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Link: https://lore.kernel.org/r/20241030130840.2890904-3-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Sibi Sankar
2024-10-30 18:38:40 +05:30
committed by Bjorn Andersson
parent 06e3c7ec80
commit 892c83aa39
1 changed files with 39 additions and 24 deletions
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63
arch/arm64/boot/dts/qcom/x1e80100.dtsi
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@@ -72,8 +72,8 @@ cpu0: cpu@0 {
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd0>;
power-domain-names = "psci";
power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
l2_0: l2-cache {
@@ -89,8 +89,8 @@ cpu1: cpu@100 {
reg = <0x0 0x100>;
enable-method = "psci";
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd1>;
power-domain-names = "psci";
power-domains = <&cpu_pd1>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -100,8 +100,8 @@ cpu2: cpu@200 {
reg = <0x0 0x200>;
enable-method = "psci";
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd2>;
power-domain-names = "psci";
power-domains = <&cpu_pd2>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -111,8 +111,8 @@ cpu3: cpu@300 {
reg = <0x0 0x300>;
enable-method = "psci";
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd3>;
power-domain-names = "psci";
power-domains = <&cpu_pd3>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -122,8 +122,8 @@ cpu4: cpu@10000 {
reg = <0x0 0x10000>;
enable-method = "psci";
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd4>;
power-domain-names = "psci";
power-domains = <&cpu_pd4>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
l2_1: l2-cache {
@@ -139,8 +139,8 @@ cpu5: cpu@10100 {
reg = <0x0 0x10100>;
enable-method = "psci";
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd5>;
power-domain-names = "psci";
power-domains = <&cpu_pd5>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -150,8 +150,8 @@ cpu6: cpu@10200 {
reg = <0x0 0x10200>;
enable-method = "psci";
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd6>;
power-domain-names = "psci";
power-domains = <&cpu_pd6>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -161,8 +161,8 @@ cpu7: cpu@10300 {
reg = <0x0 0x10300>;
enable-method = "psci";
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd7>;
power-domain-names = "psci";
power-domains = <&cpu_pd7>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -172,8 +172,8 @@ cpu8: cpu@20000 {
reg = <0x0 0x20000>;
enable-method = "psci";
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd8>;
power-domain-names = "psci";
power-domains = <&cpu_pd8>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
l2_2: l2-cache {
@@ -189,8 +189,8 @@ cpu9: cpu@20100 {
reg = <0x0 0x20100>;
enable-method = "psci";
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd9>;
power-domain-names = "psci";
power-domains = <&cpu_pd9>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -200,8 +200,8 @@ cpu10: cpu@20200 {
reg = <0x0 0x20200>;
enable-method = "psci";
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd10>;
power-domain-names = "psci";
power-domains = <&cpu_pd10>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -211,8 +211,8 @@ cpu11: cpu@20300 {
reg = <0x0 0x20300>;
enable-method = "psci";
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd11>;
power-domain-names = "psci";
power-domains = <&cpu_pd11>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
@@ -323,6 +323,21 @@ scm: scm {
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
qcom,dload-mode = <&tcsr 0x19000>;
};
scmi {
compatible = "arm,scmi";
mboxes = <&cpucp_mbox 0>, <&cpucp_mbox 2>;
mbox-names = "tx", "rx";
shmem = <&cpu_scp_lpri0>, <&cpu_scp_lpri1>;
#address-cells = <1>;
#size-cells = <0>;
scmi_dvfs: protocol@13 {
reg = <0x13>;
#power-domain-cells = <1>;
};
};
};
clk_virt: interconnect-0 {