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drm/amd/display: Add updated MCIF ARB register definitions

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[WHY&HOW]
DCN4+ use a new structure for MCIF arbiter registers.

Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dillon Varone
2026-06-22 11:42:39 -04:00
committed by Alex Deucher
parent b1cb2fc140
commit 889afb51af
1 changed files with 16 additions and 8 deletions
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24
drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h
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@@ -27,6 +27,7 @@
#include "dc_hw_types.h"
#include "dml2_0/dml21/inc/dml_top_dchub_registers.h"
enum mmhubbub_wbif_mode {
PACKED_444 = 0,
@@ -36,14 +37,21 @@ enum mmhubbub_wbif_mode {
};
struct mcif_arb_params {
unsigned int time_per_pixel;
unsigned int cli_watermark[4];
unsigned int pstate_watermark[4];
unsigned int arbitration_slice;
unsigned int slice_lines;
unsigned int max_scaled_time;
unsigned int dram_speed_change_duration;
union {
struct {
unsigned int time_per_pixel;
unsigned int cli_watermark[4];
unsigned int pstate_watermark[4];
unsigned int arbitration_slice;
unsigned int slice_lines;
unsigned int max_scaled_time;
unsigned int dram_speed_change_duration;
};
struct {
struct dml2_mcif_global_register_set global_regs;
struct dml2_mcif_per_pipe_register_set inst_regs;
} dcn4x; //dcn4+
};
};
struct mcif_irq_params {