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Merge tag 'tegra-for-6.15-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

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ARM: tegra: Device tree changes for v6.15-rc1

This contains a few patches that add some missing, display-related nodes
on Tegra114 and Tegra124, as well as a small fix in the display clock
used for DSI on Tegra114 and the addition of a light sensor found on the
ASUS TF101.

* tag 'tegra-for-6.15-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: tf101: Add al3000a illuminance sensor node
  ARM: tegra: Add DSI-A and DSI-B nodes on Tegra124
  ARM: tegra: Add HDA node on Tegra114
  ARM: tegra: Add ARM PMU node on Tegra114
  ARM: tegra: Switch DSI-B clock parent to PLLD on Tegra114

Link: https://lore.kernel.org/r/20250307162332.3451523-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-03-19 23:28:56 +01:00
parent 2c5ef4e0b7 237a868d30
commit 7182f5fbd3
3 changed files with 80 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
arch/arm/boot/dts/nvidia/tegra114.dtsi
View File

@@ -139,7 +139,7 @@ dsib: dsi@54400000 {
reg = <0x54400000 0x00040000>;
clocks = <&tegra_car TEGRA114_CLK_DSIB>,
<&tegra_car TEGRA114_CLK_DSIBLP>,
<&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;
<&tegra_car TEGRA114_CLK_PLL_D_OUT0>;
clock-names = "dsi", "lp", "parent";
resets = <&tegra_car 82>;
reset-names = "dsi";
@@ -577,6 +577,21 @@ mc: memory-controller@70019000 {
#iommu-cells = <1>;
};
hda@70030000 {
compatible = "nvidia,tegra114-hda", "nvidia,tegra30-hda";
reg = <0x70030000 0x10000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_HDA>,
<&tegra_car TEGRA114_CLK_HDA2HDMI>,
<&tegra_car TEGRA114_CLK_HDA2CODEC_2X>;
clock-names = "hda", "hda2hdmi", "hda2codec_2x";
resets = <&tegra_car 125>, /* hda */
<&tegra_car 128>, /* hda2hdmi */
<&tegra_car 111>; /* hda2codec_2x */
reset-names = "hda", "hda2hdmi", "hda2codec_2x";
status = "disabled";
};
ahub@70080000 {
compatible = "nvidia,tegra114-ahub";
reg = <0x70080000 0x200>,
@@ -805,31 +820,40 @@ cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
};
cpu@2 {
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <2>;
};
cpu@3 {
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <3>;
};
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
timer {
compatible = "arm,armv7-timer";
interrupts =

40
arch/arm/boot/dts/nvidia/tegra124.dtsi
View File

@@ -165,6 +165,22 @@ hdmi: hdmi@54280000 {
status = "disabled";
};
dsia: dsi@54300000 {
compatible = "nvidia,tegra124-dsi";
reg = <0x0 0x54300000 0x0 0x00040000>;
clocks = <&tegra_car TEGRA124_CLK_DSIA>,
<&tegra_car TEGRA124_CLK_DSIALP>,
<&tegra_car TEGRA124_CLK_PLL_D_OUT0>;
clock-names = "dsi", "lp", "parent";
resets = <&tegra_car 48>;
reset-names = "dsi";
nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
vic@54340000 {
compatible = "nvidia,tegra124-vic";
reg = <0x0 0x54340000 0x0 0x00040000>;
@@ -177,6 +193,22 @@ vic@54340000 {
iommus = <&mc TEGRA_SWGROUP_VIC>;
};
dsib: dsi@54400000 {
compatible = "nvidia,tegra124-dsi";
reg = <0x0 0x54400000 0x0 0x00040000>;
clocks = <&tegra_car TEGRA124_CLK_DSIB>,
<&tegra_car TEGRA124_CLK_DSIBLP>,
<&tegra_car TEGRA124_CLK_PLL_D_OUT0>;
clock-names = "dsi", "lp", "parent";
resets = <&tegra_car 82>;
reset-names = "dsi";
nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
sor@54540000 {
compatible = "nvidia,tegra124-sor";
reg = <0x0 0x54540000 0x0 0x00040000>;
@@ -938,6 +970,14 @@ throttle_heavy: heavy {
};
};
mipi: mipi@700e3000 {
compatible = "nvidia,tegra124-mipi";
reg = <0x0 0x700e3000 0x0 0x100>;
clocks = <&tegra_car TEGRA124_CLK_MIPI_CAL>;
clock-names = "mipi-cal";
#nvidia,mipi-calibrate-cells = <1>;
};
dfll: clock@70110000 {
compatible = "nvidia,tegra124-dfll";
reg = <0 0x70110000 0 0x100>, /* DFLL control */

11
arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts
View File

@@ -1085,6 +1085,17 @@ smart-battery@b {
sbs,poll-retry-count = <10>;
power-supplies = <&mains>;
};
/* Dynaimage ambient light sensor */
light-sensor@1c {
compatible = "dynaimage,al3000a";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
vdd-supply = <&vdd_1v8_sys>;
};
};
};