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Merge branch 'net-phy-make-phy_package-a-separate-module'

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Heiner Kallweit says:

====================
net: phy: make phy_package a separate module

Only a handful of PHY drivers needs the PHY package functionality,
therefore make it a separate module which is built only if needed.
====================

Link: https://patch.msgid.link/eec346a4-e903-48af-8150-0191932a7a0b@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
2025-06-16 14:59:32 -07:00
parent 883af78926 7d57386905
commit 6f10624d95
7 changed files with 91 additions and 72 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/net/phy/Kconfig
View File

@@ -25,6 +25,9 @@ if PHYLIB
config SWPHY
bool
config PHY_PACKAGE
tristate
config LED_TRIGGER_PHY
bool "Support LED triggers for tracking link state"
depends on LEDS_TRIGGERS
@@ -157,6 +160,7 @@ config BCM54140_PHY
tristate "Broadcom BCM54140 PHY"
depends on HWMON || HWMON=n
select BCM_NET_PHYLIB
select PHY_PACKAGE
help
Support the Broadcom BCM54140 Quad SGMII/QSGMII PHY.
@@ -292,6 +296,7 @@ source "drivers/net/phy/mediatek/Kconfig"
config MICREL_PHY
tristate "Micrel PHYs"
depends on PTP_1588_CLOCK_OPTIONAL
select PHY_PACKAGE
help
Supports the KSZ9021, VSC8201, KS8001 PHYs.
@@ -323,6 +328,7 @@ config MICROSEMI_PHY
depends on MACSEC || MACSEC=n
depends on PTP_1588_CLOCK_OPTIONAL || !NETWORK_PHY_TIMESTAMPING
select CRYPTO_LIB_AES if MACSEC
select PHY_PACKAGE
help
Currently supports VSC8514, VSC8530, VSC8531, VSC8540 and VSC8541 PHYs

3
drivers/net/phy/Makefile
View File

@@ -3,7 +3,7 @@
libphy-y := phy.o phy-c45.o phy-core.o phy_device.o \
linkmode.o phy_link_topology.o \
phy_package.o phy_caps.o mdio_bus_provider.o
phy_caps.o mdio_bus_provider.o
mdio-bus-y += mdio_bus.o mdio_device.o
ifdef CONFIG_PHYLIB
@@ -19,6 +19,7 @@ obj-$(CONFIG_MDIO_BUS) += mdio-bus.o
obj-$(CONFIG_PHYLINK) += phylink.o
obj-$(CONFIG_PHYLIB) += libphy.o
obj-$(CONFIG_PHYLIB) += mdio_devres.o
obj-$(CONFIG_PHY_PACKAGE) += phy_package.o
obj-$(CONFIG_NETWORK_PHY_TIMESTAMPING) += mii_timestamper.o

1
drivers/net/phy/mediatek/Kconfig
View File

@@ -27,6 +27,7 @@ config MEDIATEK_GE_SOC_PHY
depends on ARCH_AIROHA || (ARCH_MEDIATEK && NVMEM_MTK_EFUSE) || \
COMPILE_TEST
select MTK_NET_PHYLIB
select PHY_PACKAGE
help
Supports MediaTek SoC built-in Gigabit Ethernet PHYs.

75
drivers/net/phy/phy-core.c
View File

@@ -375,8 +375,8 @@ static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
devad | MII_MMD_CTRL_NOINCR);
}
static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
int devad, u32 regnum)
int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
int devad, u32 regnum)
{
if (is_c45)
return __mdiobus_c45_read(bus, phy_addr, devad, regnum);
@@ -385,9 +385,10 @@ static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
/* Read the content of the MMD's selected register */
return __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
}
EXPORT_SYMBOL_GPL(mmd_phy_read);
static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
int devad, u32 regnum, u16 val)
int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
int devad, u32 regnum, u16 val)
{
if (is_c45)
return __mdiobus_c45_write(bus, phy_addr, devad, regnum, val);
@@ -396,6 +397,7 @@ static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
/* Write the data into MMD's selected register */
return __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
}
EXPORT_SYMBOL_GPL(mmd_phy_write);
/**
* __phy_read_mmd - Convenience function for reading a register
@@ -485,71 +487,6 @@ int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
}
EXPORT_SYMBOL(phy_write_mmd);
/**
* __phy_package_read_mmd - read MMD reg relative to PHY package base addr
* @phydev: The phy_device struct
* @addr_offset: The offset to be added to PHY package base_addr
* @devad: The MMD to read from
* @regnum: The register on the MMD to read
*
* Convenience helper for reading a register of an MMD on a given PHY
* using the PHY package base address. The base address is added to
* the addr_offset value.
*
* Same calling rules as for __phy_read();
*
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
*/
int __phy_package_read_mmd(struct phy_device *phydev,
unsigned int addr_offset, int devad,
u32 regnum)
{
int addr = phy_package_address(phydev, addr_offset);
if (addr < 0)
return addr;
if (regnum > (u16)~0 || devad > 32)
return -EINVAL;
return mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
regnum);
}
EXPORT_SYMBOL(__phy_package_read_mmd);
/**
* __phy_package_write_mmd - write MMD reg relative to PHY package base addr
* @phydev: The phy_device struct
* @addr_offset: The offset to be added to PHY package base_addr
* @devad: The MMD to write to
* @regnum: The register on the MMD to write
* @val: value to write to @regnum
*
* Convenience helper for writing a register of an MMD on a given PHY
* using the PHY package base address. The base address is added to
* the addr_offset value.
*
* Same calling rules as for __phy_write();
*
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
*/
int __phy_package_write_mmd(struct phy_device *phydev,
unsigned int addr_offset, int devad,
u32 regnum, u16 val)
{
int addr = phy_package_address(phydev, addr_offset);
if (addr < 0)
return addr;
if (regnum > (u16)~0 || devad > 32)
return -EINVAL;
return mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
regnum, val);
}
EXPORT_SYMBOL(__phy_package_write_mmd);
/**
* phy_modify_changed - Function for modifying a PHY register
* @phydev: the phy_device struct

71
drivers/net/phy/phy_package.c
View File

@@ -52,7 +52,8 @@ void *phy_package_get_priv(struct phy_device *phydev)
}
EXPORT_SYMBOL_GPL(phy_package_get_priv);
int phy_package_address(struct phy_device *phydev, unsigned int addr_offset)
static int phy_package_address(struct phy_device *phydev,
unsigned int addr_offset)
{
struct phy_package_shared *shared = phydev->shared;
u8 base_addr = shared->base_addr;
@@ -90,6 +91,71 @@ int __phy_package_write(struct phy_device *phydev, unsigned int addr_offset,
}
EXPORT_SYMBOL_GPL(__phy_package_write);
/**
* __phy_package_read_mmd - read MMD reg relative to PHY package base addr
* @phydev: The phy_device struct
* @addr_offset: The offset to be added to PHY package base_addr
* @devad: The MMD to read from
* @regnum: The register on the MMD to read
*
* Convenience helper for reading a register of an MMD on a given PHY
* using the PHY package base address. The base address is added to
* the addr_offset value.
*
* Same calling rules as for __phy_read();
*
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
*/
int __phy_package_read_mmd(struct phy_device *phydev,
unsigned int addr_offset, int devad,
u32 regnum)
{
int addr = phy_package_address(phydev, addr_offset);
if (addr < 0)
return addr;
if (regnum > (u16)~0 || devad > 32)
return -EINVAL;
return mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
regnum);
}
EXPORT_SYMBOL(__phy_package_read_mmd);
/**
* __phy_package_write_mmd - write MMD reg relative to PHY package base addr
* @phydev: The phy_device struct
* @addr_offset: The offset to be added to PHY package base_addr
* @devad: The MMD to write to
* @regnum: The register on the MMD to write
* @val: value to write to @regnum
*
* Convenience helper for writing a register of an MMD on a given PHY
* using the PHY package base address. The base address is added to
* the addr_offset value.
*
* Same calling rules as for __phy_write();
*
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
*/
int __phy_package_write_mmd(struct phy_device *phydev,
unsigned int addr_offset, int devad,
u32 regnum, u16 val)
{
int addr = phy_package_address(phydev, addr_offset);
if (addr < 0)
return addr;
if (regnum > (u16)~0 || devad > 32)
return -EINVAL;
return mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
regnum, val);
}
EXPORT_SYMBOL(__phy_package_write_mmd);
static bool __phy_package_set_once(struct phy_device *phydev, unsigned int b)
{
struct phy_package_shared *shared = phydev->shared;
@@ -348,3 +414,6 @@ int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,
return ret;
}
EXPORT_SYMBOL_GPL(devm_of_phy_package_join);
MODULE_DESCRIPTION("PHY package support");
MODULE_LICENSE("GPL");

6
drivers/net/phy/phylib-internal.h
View File

@@ -7,6 +7,7 @@
#define __PHYLIB_INTERNAL_H
struct phy_device;
struct mii_bus;
/*
* phy_supported_speeds - return all speeds currently supported by a PHY device
@@ -20,7 +21,10 @@ void of_set_phy_timing_role(struct phy_device *phydev);
int phy_speed_down_core(struct phy_device *phydev);
void phy_check_downshift(struct phy_device *phydev);
int phy_package_address(struct phy_device *phydev, unsigned int addr_offset);
int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
int devad, u32 regnum);
int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
int devad, u32 regnum, u16 val);
int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);

1
drivers/net/phy/qcom/Kconfig
View File

@@ -24,6 +24,7 @@ config QCA808X_PHY
config QCA807X_PHY
tristate "Qualcomm QCA807x PHYs"
select QCOM_NET_PHYLIB
select PHY_PACKAGE
depends on OF_MDIO
help
Currently supports the Qualcomm QCA8072, QCA8075 and the PSGMII