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Merge tag 'tegra-for-7.2-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

Browse Source 
arm64: tegra: Changes for v7.2-rc1

This contains a fix for GPIO on Jetson AGX Thor and enables the PCIe
controllers used on this platform.

Smaug (a.k.a. Pixel C) devices can now be properly powered off via the
PMIC.

Miscellaneous improvements are made across a number of different boards,
such as SMMU enablement on Tegra194 platforms and some better bootloader
interoperation on Chromium-based devices.

Finally, various minor fixes to device tree properties round off this
set of changes.

* tag 'tegra-for-7.2-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Enable SMMU on Tegra194 display controllers
  Revert "arm64: tegra: Disable ISO SMMU for Tegra194"
  arm64: tegra: Add #{address,size}-cells to Chromium-based /firmware
  arm64: tegra: Fix aspm-l1-entry-delay-ns L1 latency cells
  arm64: tegra: Mark MAX77620 as system power controller on Smaug
  arm64: tegra: Enable PCIe for Jetson AGX Thor
  arm64: tegra: Fix address of Tegra264 main GPIO controller
  arm64: tegra: Add aspm-l1-entry-delay-ns to PCIe nodes
  arm64: tegra: Fix Tegra234 MGBE PTP clock

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2026-06-09 17:44:42 +02:00
parent 08fec5b1d3 e1215cd6d3
commit 47be56c13c
6 changed files with 103 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
View File

@@ -18,6 +18,11 @@ chosen {
stdout-path = "serial0:115200n8";
};
firmware {
#address-cells = <2>;
#size-cells = <2>;
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;

17
arch/arm64/boot/dts/nvidia/tegra194.dtsi
View File

@@ -1722,7 +1722,7 @@ bpmp-noc@d600000 {
nvidia,apbmisc = <&apbmisc>;
};
iommu@10000000 {
smmu_iso: iommu@10000000 {
compatible = "nvidia,tegra194-smmu", "nvidia,smmu-500";
reg = <0x0 0x10000000 0x0 0x800000>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
@@ -1795,7 +1795,7 @@ iommu@10000000 {
#iommu-cells = <1>;
nvidia,memory-controller = <&mc>;
status = "disabled";
status = "okay";
};
smmu: iommu@12000000 {
@@ -1962,6 +1962,7 @@ display@15200000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <0>;
@@ -1980,6 +1981,7 @@ display@15210000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <1>;
@@ -1998,6 +2000,7 @@ display@15220000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <2>;
@@ -2016,6 +2019,7 @@ display@15230000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <3>;
@@ -2382,6 +2386,7 @@ pcie@14100000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
bus-range = <0x0 0xff>;
@@ -2434,6 +2439,7 @@ pcie@14120000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
bus-range = <0x0 0xff>;
@@ -2486,6 +2492,7 @@ pcie@14140000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
bus-range = <0x0 0xff>;
@@ -2538,6 +2545,7 @@ pcie@14160000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
bus-range = <0x0 0xff>;
@@ -2583,6 +2591,7 @@ pcie-ep@14160000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
@@ -2629,6 +2638,7 @@ pcie@14180000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
bus-range = <0x0 0xff>;
@@ -2674,6 +2684,7 @@ pcie-ep@14180000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;
@@ -2723,6 +2734,7 @@ pcie@141a0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
bus-range = <0x0 0xff>;
@@ -2771,6 +2783,7 @@ pcie-ep@141a0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <8000>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,
<&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;

7
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
View File

@@ -25,6 +25,11 @@ chosen {
stdout-path = "serial0:115200n8";
};
firmware {
#address-cells = <2>;
#size-cells = <2>;
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>;
@@ -1467,6 +1472,8 @@ pmic: pmic@3c {
gpio-controller;
#gpio-cells = <2>;
system-power-controller;
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;

24
arch/arm64/boot/dts/nvidia/tegra234.dtsi
View File

@@ -3605,7 +3605,7 @@ ethernet@6800000 {
<&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,
<&bpmp TEGRA234_CLK_MGBE0_RX_PCS>,
<&bpmp TEGRA234_CLK_MGBE0_TX_PCS>;
clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
clock-names = "mgbe", "mac", "mac-divider", "ptp_ref", "rx-input-m",
"rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
"rx-pcs", "tx-pcs";
resets = <&bpmp TEGRA234_RESET_MGBE0_MAC>,
@@ -3647,7 +3647,7 @@ ethernet@6900000 {
<&bpmp TEGRA234_CLK_MGBE1_RX_PCS_M>,
<&bpmp TEGRA234_CLK_MGBE1_RX_PCS>,
<&bpmp TEGRA234_CLK_MGBE1_TX_PCS>;
clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
clock-names = "mgbe", "mac", "mac-divider", "ptp_ref", "rx-input-m",
"rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
"rx-pcs", "tx-pcs";
resets = <&bpmp TEGRA234_RESET_MGBE1_MAC>,
@@ -3689,7 +3689,7 @@ ethernet@6a00000 {
<&bpmp TEGRA234_CLK_MGBE2_RX_PCS_M>,
<&bpmp TEGRA234_CLK_MGBE2_RX_PCS>,
<&bpmp TEGRA234_CLK_MGBE2_TX_PCS>;
clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
clock-names = "mgbe", "mac", "mac-divider", "ptp_ref", "rx-input-m",
"rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
"rx-pcs", "tx-pcs";
resets = <&bpmp TEGRA234_RESET_MGBE2_MAC>,
@@ -3731,7 +3731,7 @@ ethernet@6b00000 {
<&bpmp TEGRA234_CLK_MGBE3_RX_PCS_M>,
<&bpmp TEGRA234_CLK_MGBE3_RX_PCS>,
<&bpmp TEGRA234_CLK_MGBE3_TX_PCS>;
clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
clock-names = "mgbe", "mac", "mac-divider", "ptp_ref", "rx-input-m",
"rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
"rx-pcs", "tx-pcs";
resets = <&bpmp TEGRA234_RESET_MGBE3_MAC>,
@@ -4532,6 +4532,7 @@ pcie@140a0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -4586,6 +4587,7 @@ pcie@140c0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -4640,6 +4642,7 @@ pcie@140e0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -4686,6 +4689,7 @@ pcie-ep@140e0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <32000>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE10AR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_PCIE10AW &emc>;
@@ -4734,6 +4738,7 @@ pcie@14100000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -4788,6 +4793,7 @@ pcie@14120000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -4842,6 +4848,7 @@ pcie@14140000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -4896,6 +4903,7 @@ pcie@14160000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -4937,6 +4945,7 @@ pcie-ep@14160000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <32000>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE4R &emc>,
<&mc TEGRA234_MEMORY_CLIENT_PCIE4W &emc>;
@@ -4983,6 +4992,7 @@ pcie@14180000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -5037,6 +5047,7 @@ pcie@141a0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -5083,6 +5094,7 @@ pcie-ep@141a0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <32000>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE5R &emc>,
<&mc TEGRA234_MEMORY_CLIENT_PCIE5W &emc>;
@@ -5131,6 +5143,7 @@ pcie@141c0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -5177,6 +5190,7 @@ pcie-ep@141c0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <32000>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE6AR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_PCIE6AW &emc>;
@@ -5225,6 +5239,7 @@ pcie@141e0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <16000>;
bus-range = <0x0 0xff>;
@@ -5271,6 +5286,7 @@ pcie-ep@141e0000 {
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
aspm-l1-entry-delay-ns = <32000>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE7AR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_PCIE7AW &emc>;

12
arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834-0008.dts
View File

@@ -8,4 +8,16 @@
/ {
model = "NVIDIA Jetson AGX Thor Developer Kit";
compatible = "nvidia,p4071-0000+p3834-0008", "nvidia,p3834-0008", "nvidia,tegra264";
bus@a800000000 {
/* PCIe C2 to enable Ethernet */
pci@8420000 {
status = "okay";
};
/* PCIe C5 to enable NVME */
pci@8480000 {
status = "okay";
};
};
};

88
arch/arm64/boot/dts/nvidia/tegra264.dtsi
View File

@@ -3277,50 +3277,6 @@ rtc: rtc@c2c0000 {
status = "disabled";
};
gpio_main: gpio@c300000 {
compatible = "nvidia,tegra264-gpio";
reg = <0x00 0x0c300000 0x0 0x4000>,
<0x00 0x0c310000 0x0 0x4000>;
reg-names = "security", "gpio";
wakeup-parent = <&pmc>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
serial@c4e0000 {
compatible = "nvidia,tegra264-utc";
reg = <0x0 0x0c4e0000 0x0 0x8000>,
@@ -3586,6 +3542,50 @@ pci@c000000 {
status = "disabled";
};
gpio_main: gpio@c300000 {
compatible = "nvidia,tegra264-gpio";
reg = <0x00 0x0c300000 0x0 0x4000>,
<0x00 0x0c310000 0x0 0x4000>;
reg-names = "security", "gpio";
wakeup-parent = <&pmc>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
i2c14: i2c@c410000 {
compatible = "nvidia,tegra264-i2c";
reg = <0x00 0x0c410000 0x0 0x10000>;