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arm64: tegra: Enable SMMU on Tegra194 display controllers

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These use a separate SMMU instance compared to everything else currently
enabled for the SoC.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Aaron Kling
2025-11-01 18:01:11 -05:00
committed by Thierry Reding
parent 3b7b80753c
commit e1215cd6d3
1 changed files with 5 additions and 1 deletions
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6
arch/arm64/boot/dts/nvidia/tegra194.dtsi
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@@ -1722,7 +1722,7 @@ bpmp-noc@d600000 {
nvidia,apbmisc = <&apbmisc>;
};
iommu@10000000 {
smmu_iso: iommu@10000000 {
compatible = "nvidia,tegra194-smmu", "nvidia,smmu-500";
reg = <0x0 0x10000000 0x0 0x800000>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
@@ -1962,6 +1962,7 @@ display@15200000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <0>;
@@ -1980,6 +1981,7 @@ display@15210000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <1>;
@@ -1998,6 +2000,7 @@ display@15220000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <2>;
@@ -2016,6 +2019,7 @@ display@15230000 {
interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
interconnect-names = "dma-mem", "read-1";
iommus = <&smmu_iso TEGRA194_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <3>;