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drm/amdgpu: Fix typos in comments for IP block soft reset
These typos were accidentally overlooked. Let's fix them now. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Link: https://patch.msgid.link/20260624073829.40835-2-timur.kristof@gmail.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher
parent
070e834f97
commit
2ea9fe3021
@@ -996,7 +996,7 @@ void amdgpu_multi_ring_reset_helper_begin(const u32 ring_type_mask,
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* Give some time for non-guilty rings to finish their
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* current submission, to try to minimize collateral damage.
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*
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* Note that this just a best effort, but really there
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* Note that this is just a best effort, but really there
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* is no way to really know which ring is actually responsible
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* because different rings may share resources, eg. a compute
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* ring may hog shader engines, causing a graphics ring to hang.
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@@ -1057,12 +1057,12 @@ void amdgpu_multi_ring_reset_helper_begin(const u32 ring_type_mask,
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* @guilty_ring: The ring which is guilty of causing a reset.
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* @ret: Return code from the reset function.
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*
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* After calling amdgpu_multi_ring_reset_helper_end()
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* After calling amdgpu_multi_ring_reset_helper_begin()
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* and executing the actual reset method, call this
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* function to restore normal operation.
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*
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* In case the reset failed, this function should still
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* be called to restore some state, but it won't attempt to
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* be called to restore preemption state, but it won't attempt to
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* fully restore the ring contents.
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*/
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int amdgpu_multi_ring_reset_helper_end(const u32 ring_type_mask,
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@@ -1086,7 +1086,7 @@ int amdgpu_multi_ring_reset_helper_end(const u32 ring_type_mask,
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/* Flush HDP cache so the GPU can see the updated COND_EXEC values */
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amdgpu_device_flush_hdp(adev, NULL);
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/* If the reset was unsuccessful, return without restoring anything. */
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/* If the reset was unsuccessful, return without restoring anything else. */
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if (ret)
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return ret;
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