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Merge tag 'qcom-arm64-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Browse Source 
Qualcomm Arm64 DeviceTree updates for v6.10

Support for Sony Xperia 1V, on the SM8550 platform, is added.

On IPQ8074, UART6 is described and unused gpios from QPIC are removed.

Backlight and touchscreen are described on Samsung Grand Prime devices.

RGB LED is added to Sony Xperia "Yoshino" devices, on which the
volume-up key definition is corrected as well.

Light Pulse Generator node is added to PM6150L PMIC, and blocks related
to USB Type-C on PM6150 are added.

On QCS6490 Rb3Gen2 UFS storage, USB Type-C management, a couple of
remoteprocs and both USB Type-C and native DisplayPort are enabled.
For the related IDP display is enabled, and the PMIC volume and power
buttons are described.
The inline crypto engine is added for SC7280, and an additional turbo
frequency is added to the MDP.

USB Type-C port management is introduce for the QRB2210 RB1. WiFi
firmware-name qualifier is added to both RB1 and RB2 boards.
The LMH node is added for the QCM2290, to configure the thresholds as
well as provide thermal pressure input.

The regulator range is adjusted for SD-card IO on SA8155P ADP, to allow
UHS modes.

The unused DCC is disabled on SC7180, and unused PMIC gpio block is
disabled on Trogdor.

For Lenovo Flex 5G, on SC8180X, the GPU firmware path is aligned with
agreed upon firmware structure. The frequency of the I2C bus for
touchpad is brought up to mitigate missing events. A number of
additional cleanups are introduced.

For SC8280XP GICv3 ITS is wired up for PCIe. EAS properties ad
introduced. A PS_HOLD-based restart node is introduced and acts as a
fallback if other mechanisms are unavailable to restart the board.
QFPROM is described, missing LMH interrupts for thermal pressure are
added. The TCSR download mode register is added, to allow configuring
if download mode should be entered on a crash.

USB Type-C handling is introduce for Fairphone FP3 as well.

On SM6350 crypto engine and DisplayPort controllers are introduced.

WiFi is enabled on the SM8150 Hardware Development Kit (HDK)

USB PD properties are added on Xiaomi Mi Pad 5 Pro devices.

Interconnect paths are added for UFS on SM8350, to ensure the bus is
voted for when the controller is operating.

On SM8550 the DMA coherency properties are corrected for SMMU and a few
consumers. Missing DWC3 quirks are added and the SNPS PHY parameters are
adjusted. Fastrpc banks are marked non-secure as needed.

The GPU description is introduced on SM8650, and enabled on the QRD. A
missing reserved-memory node is added, as is a few missing fastrpc
compute banks, and the non-secure-domain flag for other banks.

On X1 Elite SPMI support is added, together with PMIC definitons. The
link properties for DP3 are corrected, and audio-related resets are
introduced. SoundWire properties are corrected.

Nodes describing the PCIe bridge under the host controller is added
for a bunch of platforms.

The GPIO carrying orientation information for USB Type-C is added across
Fairphone 5, Lenovo Flex 5G, Lenovo Thinkpad X13s, SM8350 and SM845
HDKs.

A few dtbTool-specific compatibles for msm8916 is dropped from the
bindings.

A number of DeviceTree binding validation issues are corrected.

* tag 'qcom-arm64-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (110 commits)
  dt-bindings: arm: qcom: Add Samsung Galaxy S5 China (kltechn)
  arm64: dts: qcom: qrb4210-rb1: add firmware-name qualifier to WiFi node
  arm64: dts: qcom: qrb2210-rb1: add firmware-name qualifier to WiFi node
  arm64: dts: qcom: ipq6018: Add PCIe bridge node
  arm64: dts: qcom: ipq8074: Add PCIe bridge node
  arm64: dts: qcom: msm8996: Add PCIe bridge node
  arm64: dts: qcom: sc8180x: Add PCIe bridge node
  arm64: dts: qcom: qcs404: Add PCIe bridge node
  arm64: dts: qcom: sc7280: Add PCIe bridge node
  arm64: dts: qcom: msm8998: Add PCIe bridge node
  arm64: dts: qcom: sc8280xp: Add PCIe bridge node
  arm64: dts: qcom: sa8775p: Add PCIe bridge node
  arm64: dts: qcom: sm8650: Add PCIe bridge node
  arm64: dts: qcom: sm8550: Add PCIe bridge node
  arm64: dts: qcom: sm8450: Add PCIe bridge node
  arm64: dts: qcom: sm8350: Add PCIe bridge node
  arm64: dts: qcom: sm8150: Add PCIe bridge node
  arm64: dts: qcom: sdm845: Add PCIe bridge node
  arm64: dts: qcom: sm8250: Add PCIe bridge node
  arm64: dts: qcom: sdm845-db845c: make pcie0_3p3v_dual always-on
  ...

Link: https://lore.kernel.org/r/20240427175951.1439887-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2024-04-29 16:43:22 +02:00
parent 80a02b1763 873d845a35
commit 1d3454fafb
60 changed files with 2720 additions and 148 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@@ -185,13 +185,16 @@ properties:
- oneplus,bacon
- samsung,klte
- sony,xperia-castor
- sony,xperia-leo
- const: qcom,msm8974pro
- const: qcom,msm8974
- items:
- const: qcom,msm8916-mtp
- const: qcom,msm8916-mtp/1
- const: qcom,msm8916
- enum:
- samsung,kltechn
- const: samsung,klte
- const: qcom,msm8974pro
- const: qcom,msm8974
- items:
- enum:
@@ -201,6 +204,8 @@ properties:
- gplus,fl8005a
- huawei,g7
- longcheer,l8910
- longcheer,l8150
- qcom,msm8916-mtp
- samsung,a3u-eur
- samsung,a5u-eur
- samsung,e5
@@ -221,11 +226,6 @@ properties:
- yiming,uz801-v3
- const: qcom,msm8916
- items:
- const: longcheer,l8150
- const: qcom,msm8916-v1-qrd/9-v1
- const: qcom,msm8916
- items:
- enum:
- motorola,potter
@@ -1004,6 +1004,7 @@ properties:
- qcom,sm8550-hdk
- qcom,sm8550-mtp
- qcom,sm8550-qrd
- sony,pdx234
- const: qcom,sm8550
- items:

14
Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
View File

@@ -58,20 +58,6 @@ patternProperties:
required:
- compatible
allOf:
- if:
not:
properties:
compatible:
contains:
enum:
- qcom,sm8450-pmic-glink
- qcom,sm8550-pmic-glink
- qcom,x1e80100-pmic-glink
then:
properties:
orientation-gpios: false
additionalProperties: false
examples:

1
arch/arm64/boot/dts/qcom/Makefile
View File

@@ -241,6 +241,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx224.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-sony-xperia-yodo-pdx234.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb

12
arch/arm64/boot/dts/qcom/apq8016-sbc.dts
View File

@@ -91,7 +91,7 @@ leds {
compatible = "gpio-leds";
led@1 {
led-1 {
label = "apq8016-sbc:green:user1";
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_GREEN>;
@@ -100,7 +100,7 @@ led@1 {
default-state = "off";
};
led@2 {
led-2 {
label = "apq8016-sbc:green:user2";
function = LED_FUNCTION_DISK_ACTIVITY;
color = <LED_COLOR_ID_GREEN>;
@@ -109,7 +109,7 @@ led@2 {
default-state = "off";
};
led@3 {
led-3 {
label = "apq8016-sbc:green:user3";
function = LED_FUNCTION_DISK_ACTIVITY;
color = <LED_COLOR_ID_GREEN>;
@@ -118,7 +118,7 @@ led@3 {
default-state = "off";
};
led@4 {
led-4 {
label = "apq8016-sbc:green:user4";
color = <LED_COLOR_ID_GREEN>;
gpios = <&pm8916_gpios 2 GPIO_ACTIVE_HIGH>;
@@ -127,7 +127,7 @@ led@4 {
default-state = "off";
};
led@5 {
led-5 {
label = "apq8016-sbc:yellow:wlan";
function = LED_FUNCTION_WLAN;
color = <LED_COLOR_ID_YELLOW>;
@@ -136,7 +136,7 @@ led@5 {
default-state = "off";
};
led@6 {
led-6 {
label = "apq8016-sbc:blue:bt";
function = LED_FUNCTION_BLUETOOTH;
color = <LED_COLOR_ID_BLUE>;

10
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@@ -907,6 +907,16 @@ pcie0: pcie@20000000 {
"axi_s_sticky";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
};

41
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@@ -323,6 +323,13 @@ serial_4_pins: serial4-state {
bias-disable;
};
serial_5_pins: serial5-state {
pins = "gpio9", "gpio16";
function = "blsp5_uart";
drive-strength = <8>;
bias-disable;
};
i2c_0_pins: i2c-0-state {
pins = "gpio42", "gpio43";
function = "blsp1_i2c";
@@ -349,7 +356,7 @@ qpic_pins: qpic-state {
"gpio5", "gpio6", "gpio7",
"gpio8", "gpio10", "gpio11",
"gpio12", "gpio13", "gpio14",
"gpio15", "gpio16", "gpio17";
"gpio15", "gpio17";
function = "qpic";
drive-strength = <8>;
bias-disable;
@@ -471,6 +478,18 @@ blsp1_uart5: serial@78b3000 {
status = "disabled";
};
blsp1_uart6: serial@78b4000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x078b4000 0x200>;
interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
pinctrl-0 = <&serial_5_pins>;
pinctrl-names = "default";
status = "disabled";
};
blsp1_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
@@ -864,6 +883,16 @@ IRQ_TYPE_LEVEL_HIGH>, /* int_c */
"ahb",
"axi_m_sticky";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0: pcie@20000000 {
@@ -929,6 +958,16 @@ IRQ_TYPE_LEVEL_HIGH>, /* int_c */
"axi_m_sticky",
"axi_s_sticky";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
};

2
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
View File

@@ -12,7 +12,7 @@
/ {
model = "Longcheer L8150";
compatible = "longcheer,l8150", "qcom,msm8916-v1-qrd/9-v1", "qcom,msm8916";
compatible = "longcheer,l8150", "qcom,msm8916";
chassis-type = "handset";
aliases {

2
arch/arm64/boot/dts/qcom/msm8916-mtp.dts
View File

@@ -9,7 +9,7 @@
/ {
model = "Qualcomm Technologies, Inc. MSM 8916 MTP";
compatible = "qcom,msm8916-mtp", "qcom,msm8916-mtp/1", "qcom,msm8916";
compatible = "qcom,msm8916-mtp", "qcom,msm8916";
chassis-type = "handset";
aliases {

6
arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
View File

@@ -128,6 +128,12 @@ muic: extcon@25 {
pinctrl-names = "default";
pinctrl-0 = <&muic_int_default>;
usb_con: connector {
compatible = "usb-b-connector";
label = "micro-USB";
type = "micro";
};
};
};

6
arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi
View File

@@ -23,6 +23,12 @@ muic: extcon@14 {
pinctrl-names = "default";
pinctrl-0 = <&muic_int_default>;
usb_con: connector {
compatible = "usb-b-connector";
label = "micro-USB";
type = "micro";
};
};
};

83
arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi
View File

@@ -26,6 +26,30 @@ tz-apps@85a00000 {
};
};
clk_pwm_backlight: backlight {
compatible = "pwm-backlight";
pwms = <&clk_pwm 0 100000>;
enable-gpios = <&tlmm 98 GPIO_ACTIVE_HIGH>;
brightness-levels = <0 255>;
num-interpolated-steps = <255>;
default-brightness-level = <128>;
pinctrl-0 = <&backlight_en_default>;
pinctrl-names = "default";
};
clk_pwm: pwm {
compatible = "clk-pwm";
#pwm-cells = <2>;
clocks = <&gcc GCC_GP2_CLK>;
pinctrl-0 = <&backlight_pwm_default>;
pinctrl-names = "default";
};
gpio-keys {
compatible = "gpio-keys";
@@ -66,6 +90,19 @@ reg_motor_vdd: regulator-motor-vdd {
pinctrl-0 = <&motor_en_default>;
pinctrl-names = "default";
};
reg_vdd_tsp_a: regulator-vdd-tsp-a {
compatible = "regulator-fixed";
regulator-name = "vdd_tsp_a";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&tlmm 73 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&tsp_en_default>;
pinctrl-names = "default";
};
};
&blsp_i2c1 {
@@ -94,6 +131,26 @@ fuel-gauge@35 {
};
};
&blsp_i2c5 {
status = "okay";
touchscreen: touchscreen@20 {
compatible = "zinitix,bt541";
reg = <0x20>;
interrupts-extended = <&tlmm 13 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <540>;
touchscreen-size-y = <960>;
vcca-supply = <&reg_vdd_tsp_a>;
vdd-supply = <&pm8916_l6>;
pinctrl-0 = <&tsp_int_default>;
pinctrl-names = "default";
};
};
&blsp_uart2 {
status = "okay";
};
@@ -166,6 +223,18 @@ &wcnss_mem {
};
&tlmm {
backlight_en_default: backlight-en-default-state {
pins = "gpio98";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
backlight_pwm_default: backlight-pwm-default-state {
pins = "gpio50";
function = "gcc_gp2_clk_a";
};
fg_alert_default: fg-alert-default-state {
pins = "gpio121";
function = "gpio";
@@ -200,4 +269,18 @@ sdc2_cd_default: sdc2-cd-default-state {
drive-strength = <2>;
bias-disable;
};
tsp_en_default: tsp-en-default-state {
pins = "gpio73";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tsp_int_default: tsp-int-default-state {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

12
arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi
View File

@@ -5,6 +5,9 @@
/* SM5504 MUIC instead of SM5502 */
/delete-node/ &muic;
/* Touchscreen varies depending on model variant */
/delete-node/ &touchscreen;
&blsp_i2c1 {
muic: extcon@14 {
compatible = "siliconmitus,sm5504-muic";
@@ -14,3 +17,12 @@ muic: extcon@14 {
pinctrl-names = "default";
};
};
/* On rossa backlight is controlled with MIPI DCS commands */
&clk_pwm {
status = "disabled";
};
&clk_pwm_backlight {
status = "disabled";
};

6
arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts
View File

@@ -286,6 +286,12 @@ muic: extcon@25 {
pinctrl-0 = <&muic_int_default>;
pinctrl-names = "default";
usb_con: connector {
compatible = "usb-b-connector";
label = "micro-USB";
type = "micro";
};
};
};

14
arch/arm64/boot/dts/qcom/msm8953.dtsi
View File

@@ -1323,6 +1323,20 @@ usb3_dwc3: usb@7000000 {
snps,hird-threshold = /bits/ 8 <0x00>;
maximum-speed = "high-speed";
usb-role-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_dwc3_hs: endpoint {
};
};
};
};
};

30
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@@ -1929,6 +1929,16 @@ pcie0: pcie@600000 {
"cfg",
"bus_master",
"bus_slave";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1: pcie@608000 {
@@ -1982,6 +1992,16 @@ pcie1: pcie@608000 {
"cfg",
"bus_master",
"bus_slave";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie2: pcie@610000 {
@@ -2032,6 +2052,16 @@ pcie2: pcie@610000 {
"cfg",
"bus_master",
"bus_slave";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
};

67
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
View File

@@ -98,30 +98,35 @@ extcon_usb: extcon-usb {
gpio-keys {
compatible = "gpio-keys";
label = "Side buttons";
pinctrl-0 = <&focus_n &snapshot_n &vol_down_n &vol_up_n>;
pinctrl-names = "default";
pinctrl-0 = <&vol_down_n &focus_n &snapshot_n>;
button-vol-down {
label = "Volume Down";
gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_VOLUMEDOWN>;
wakeup-source;
button-camera-focus {
label = "Camera Focus";
gpios = <&pm8998_gpios 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_CAMERA_FOCUS>;
debounce-interval = <15>;
};
button-camera-snapshot {
label = "Camera Snapshot";
gpios = <&pm8998_gpios 7 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_CAMERA>;
debounce-interval = <15>;
};
button-camera-focus {
label = "Camera Focus";
gpios = <&pm8998_gpios 8 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_CAMERA_FOCUS>;
button-vol-down {
label = "Volume Down";
gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
wakeup-source;
debounce-interval = <15>;
};
button-vol-up {
label = "Volume Up";
gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
wakeup-source;
debounce-interval = <15>;
};
};
@@ -345,6 +350,14 @@ vol_down_n: vol-down-n-state {
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
vol_up_n: vol-up-n-state {
pins = "gpio6";
function = PMIC_GPIO_FUNC_NORMAL;
bias-pull-up;
input-enable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
focus_n: focus-n-state {
pins = "gpio7";
function = PMIC_GPIO_FUNC_NORMAL;
@@ -405,9 +418,33 @@ vib_ldo_en: vib-ldo-en-state {
};
};
&pm8998_resin {
linux,code = <KEY_VOLUMEUP>;
&pmi8998_lpg {
qcom,power-source = <1>;
status = "okay";
multi-led {
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_STATUS;
#address-cells = <1>;
#size-cells = <0>;
led@3 {
reg = <3>;
color = <LED_COLOR_ID_BLUE>;
};
led@4 {
reg = <4>;
color = <LED_COLOR_ID_GREEN>;
};
led@5 {
reg = <5>;
color = <LED_COLOR_ID_RED>;
};
};
};
&qusb2phy {

10
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@@ -972,6 +972,16 @@ pcie0: pcie@1c00000 {
power-domains = <&gcc PCIE_0_GDSC>;
iommu-map = <0x100 &anoc1_smmu 0x1480 1>;
perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie_phy: phy@1c06000 {

4
arch/arm64/boot/dts/qcom/pm6150.dtsi
View File

@@ -71,8 +71,8 @@ pm6150_vbus: usb-vbus-regulator@1100 {
};
pm6150_typec: typec@1500 {
compatible = "qcom,pm6150-typec,
qcom,pm8150b-typec";
compatible = "qcom,pm6150-typec",
"qcom,pm8150b-typec";
reg = <0x1500>, <0x1700>;
interrupts = <0x0 0x15 0x00 IRQ_TYPE_EDGE_RISING>,
<0x0 0x15 0x01 IRQ_TYPE_EDGE_BOTH>,

10
arch/arm64/boot/dts/qcom/pm6150l.dtsi
View File

@@ -118,6 +118,16 @@ pm6150l_flash: led-controller@d300 {
status = "disabled";
};
pm6150l_lpg: pwm {
compatible = "qcom,pm6150l-lpg", "qcom,pm8150l-lpg";
#address-cells = <1>;
#size-cells = <0>;
#pwm-cells = <2>;
status = "disabled";
};
pm6150l_wled: leds@d800 {
compatible = "qcom,pm6150l-wled";
reg = <0xd800>, <0xd900>;

56
arch/arm64/boot/dts/qcom/qcm2290.dtsi
View File

@@ -694,10 +694,31 @@ usb_qmpphy: phy@1615000 {
clock-output-names = "usb3_phy_pipe_clk_src";
#phy-cells = <0>;
orientation-switch;
qcom,tcsr-reg = <&tcsr_regs 0xb244>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_qmpphy_out: endpoint {
};
};
port@1 {
reg = <1>;
usb_qmpphy_usb_ss_in: endpoint {
remote-endpoint = <&usb_dwc3_ss>;
};
};
};
};
system_noc: interconnect@1880000 {
@@ -1380,6 +1401,27 @@ usb_dwc3: usb@4e00000 {
snps,usb3_lpm_capable;
maximum-speed = "super-speed";
dr_mode = "otg";
usb-role-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
usb_dwc3_ss: endpoint {
remote-endpoint = <&usb_qmpphy_usb_ss_in>;
};
};
};
};
};
@@ -1858,7 +1900,7 @@ cpufreq_hw: cpufreq@f521000 {
compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";
reg = <0x0 0x0f521000 0x0 0x1000>;
reg-names = "freq-domain0";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&lmh_cluster 0>;
interrupt-names = "dcvsh-irq-0";
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
@@ -1866,6 +1908,18 @@ cpufreq_hw: cpufreq@f521000 {
#freq-domain-cells = <1>;
#clock-cells = <1>;
};
lmh_cluster: lmh@f550800 {
compatible = "qcom,qcm2290-lmh", "qcom,sm8150-lmh";
reg = <0x0 0x0f550800 0x0 0x400>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
cpus = <&CPU0>;
qcom,lmh-temp-arm-millicelsius = <65000>;
qcom,lmh-temp-low-millicelsius = <94500>;
qcom,lmh-temp-high-millicelsius = <95000>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
thermal-zones {

2
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
View File

@@ -77,6 +77,8 @@ pmic-glink {
#address-cells = <1>;
#size-cells = <0>;
orientation-gpios = <&tlmm 140 GPIO_ACTIVE_HIGH>;
connector@0 {
compatible = "usb-c-connector";
reg = <0>;

189
arch/arm64/boot/dts/qcom/qcm6490-idp.dts
View File

@@ -9,7 +9,9 @@
#define PM7250B_SID 8
#define PM7250B_SID1 9
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "pm7250b.dtsi"
@@ -35,10 +37,45 @@ aliases {
serial0 = &uart5;
};
pm8350c_pwm_backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pm8350c_pwm 3 65535>;
enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pmic_lcd_bl_en>;
pinctrl-names = "default";
};
chosen {
stdout-path = "serial0:115200n8";
};
lcd_disp_bias: regulator-lcd-disp-bias {
compatible = "regulator-fixed";
regulator-name = "lcd_disp_bias";
regulator-min-microvolt = <5500000>;
regulator-max-microvolt = <5500000>;
gpio = <&pm7250b_gpios 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&lcd_disp_bias_en>;
pinctrl-names = "default";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&key_vol_up_default>;
pinctrl-names = "default";
key-volume-up {
label = "Volume_up";
gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
wakeup-source;
debounce-interval = <15>;
linux,can-disable;
};
};
reserved-memory {
xbl_mem: xbl@80700000 {
reg = <0x0 0x80700000 0x0 0x100000>;
@@ -158,129 +195,151 @@ regulators-0 {
vdd-l14-l16-supply = <&vreg_s8b_1p272>;
vreg_s1b_1p872: smps1 {
regulator-name = "vreg_s1b_1p872";
regulator-min-microvolt = <1840000>;
regulator-max-microvolt = <2040000>;
};
vreg_s2b_0p876: smps2 {
regulator-name = "vreg_s2b_0p876";
regulator-min-microvolt = <570070>;
regulator-max-microvolt = <1050000>;
};
vreg_s7b_0p972: smps7 {
regulator-name = "vreg_s7b_0p972";
regulator-min-microvolt = <535000>;
regulator-max-microvolt = <1120000>;
};
vreg_s8b_1p272: smps8 {
regulator-name = "vreg_s8b_1p272";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1500000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>;
};
vreg_l1b_0p912: ldo1 {
regulator-name = "vreg_l1b_0p912";
regulator-min-microvolt = <825000>;
regulator-max-microvolt = <925000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2b_3p072: ldo2 {
regulator-name = "vreg_l2b_3p072";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3b_0p504: ldo3 {
regulator-name = "vreg_l3b_0p504";
regulator-min-microvolt = <312000>;
regulator-max-microvolt = <910000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4b_0p752: ldo4 {
regulator-name = "vreg_l4b_0p752";
regulator-min-microvolt = <752000>;
regulator-max-microvolt = <820000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
reg_l5b_0p752: ldo5 {
regulator-name = "reg_l5b_0p752";
regulator-min-microvolt = <552000>;
regulator-max-microvolt = <832000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6b_1p2: ldo6 {
regulator-name = "vreg_l6b_1p2";
regulator-min-microvolt = <1140000>;
regulator-max-microvolt = <1260000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7b_2p952: ldo7 {
regulator-name = "vreg_l7b_2p952";
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8b_0p904: ldo8 {
regulator-name = "vreg_l8b_0p904";
regulator-min-microvolt = <870000>;
regulator-max-microvolt = <970000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9b_1p2: ldo9 {
regulator-name = "vreg_l9b_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11b_1p504: ldo11 {
regulator-name = "vreg_l11b_1p504";
regulator-min-microvolt = <1504000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12b_0p751: ldo12 {
regulator-name = "vreg_l12b_0p751";
regulator-min-microvolt = <751000>;
regulator-max-microvolt = <824000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13b_0p53: ldo13 {
regulator-name = "vreg_l13b_0p53";
regulator-min-microvolt = <530000>;
regulator-max-microvolt = <824000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l14b_1p08: ldo14 {
regulator-name = "vreg_l14b_1p08";
regulator-min-microvolt = <1080000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l15b_0p765: ldo15 {
regulator-name = "vreg_l15b_0p765";
regulator-min-microvolt = <765000>;
regulator-max-microvolt = <1020000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l16b_1p1: ldo16 {
regulator-name = "vreg_l16b_1p1";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17b_1p7: ldo17 {
regulator-name = "vreg_l17b_1p7";
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l18b_1p8: ldo18 {
regulator-name = "vreg_l18b_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l19b_1p8: ldo19 {
regulator-name = "vreg_l19b_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -312,116 +371,217 @@ regulators-1 {
vdd-bob-supply = <&vph_pwr>;
vreg_s1c_2p19: smps1 {
regulator-name = "vreg_s1c_2p19";
regulator-min-microvolt = <2190000>;
regulator-max-microvolt = <2210000>;
};
vreg_s2c_0p752: smps2 {
regulator-name = "vreg_s2c_0p752";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <800000>;
};
vreg_s5c_0p752: smps5 {
regulator-name = "vreg_s5c_0p752";
regulator-min-microvolt = <465000>;
regulator-max-microvolt = <1050000>;
};
vreg_s7c_0p752: smps7 {
regulator-name = "vreg_s7c_0p752";
regulator-min-microvolt = <465000>;
regulator-max-microvolt = <800000>;
};
vreg_s9c_1p084: smps9 {
regulator-name = "vreg_s9c_1p084";
regulator-min-microvolt = <1010000>;
regulator-max-microvolt = <1170000>;
};
vreg_l1c_1p8: ldo1 {
regulator-name = "vreg_l1c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1980000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2c_1p62: ldo2 {
regulator-name = "vreg_l2c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <1980000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3c_2p8: ldo3 {
regulator-name = "vreg_l3c_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3540000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4c_1p62: ldo4 {
regulator-name = "vreg_l4c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5c_1p62: ldo5 {
regulator-name = "vreg_l5c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6c_2p96: ldo6 {
regulator-name = "vreg_l6c_2p96";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c_3p0: ldo7 {
regulator-name = "vreg_l7c_3p0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8c_1p62: ldo8 {
regulator-name = "vreg_l8c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9c_2p96: ldo9 {
regulator-name = "vreg_l9c_2p96";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <35440000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_0p88: ldo10 {
regulator-name = "vreg_l10c_0p88";
regulator-min-microvolt = <720000>;
regulator-max-microvolt = <1050000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11c_2p8: ldo11 {
regulator-name = "vreg_l11c_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12c_1p65: ldo12 {
regulator-name = "vreg_l12c_1p65";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13c_2p7: ldo13 {
regulator-name = "vreg_l13c_2p7";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_bob_3p296: bob {
regulator-name = "vreg_bob_3p296";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3960000>;
};
};
};
&mdss {
status = "okay";
};
&mdss_dsi {
vdda-supply = <&vreg_l6b_1p2>;
status = "okay";
panel@0 {
compatible = "novatek,nt36672e";
reg = <0>;
reset-gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
vddi-supply = <&vreg_l8c_1p62>;
avdd-supply = <&lcd_disp_bias>;
avee-supply = <&lcd_disp_bias>;
backlight = <&pm8350c_pwm_backlight>;
port {
panel0_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
};
&mdss_dsi0_out {
remote-endpoint = <&panel0_in>;
data-lanes = <0 1 2 3>;
};
&mdss_dsi_phy {
vdds-supply = <&vreg_l10c_0p88>;
status = "okay";
};
&pm7250b_gpios {
lcd_disp_bias_en: lcd-disp-bias-en-state {
pins = "gpio2";
function = "func1";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
input-disable;
output-enable;
power-source = <0>;
};
};
&pm8350c_gpios {
pmic_lcd_bl_en: pmic-lcd-bl-en-state {
pins = "gpio7";
function = "normal";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
output-low;
power-source = <0>;
};
pmic_lcd_bl_pwm: pmic-lcd-bl-pwm-state {
pins = "gpio8";
function = "func1";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
output-low;
power-source = <0>;
};
};
&pm7325_gpios {
key_vol_up_default: key-vol-up-state {
pins = "gpio6";
function = "normal";
input-enable;
bias-pull-up;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
};
};
&pm8350c_pwm {
pinctrl-0 = <&pmic_lcd_bl_pwm>;
pinctrl-names = "default";
status = "okay";
multi-led {
@@ -448,10 +608,39 @@ led@3 {
};
};
&pon_pwrkey {
status = "okay";
};
&pon_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&qupv3_id_0 {
status = "okay";
};
&remoteproc_adsp {
firmware-name = "qcom/qcm6490/adsp.mbn";
status = "okay";
};
&remoteproc_cdsp {
firmware-name = "qcom/qcm6490/cdsp.mbn";
status = "okay";
};
&remoteproc_mpss {
firmware-name = "qcom/qcm6490/modem.mbn";
status = "okay";
};
&remoteproc_wpss {
firmware-name = "qcom/qcm6490/wpss.mbn";
status = "okay";
};
&sdhc_1 {
non-removable;
no-sd;

10
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@@ -1516,6 +1516,16 @@ pcie: pcie@10000000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
};

251
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
View File

@@ -17,7 +17,6 @@
#include "pmk8350.dtsi"
/delete-node/ &ipa_fw_mem;
/delete-node/ &remoteproc_mpss;
/delete-node/ &rmtfs_mem;
/delete-node/ &adsp_mem;
/delete-node/ &cdsp_mem;
@@ -39,6 +38,20 @@ chosen {
stdout-path = "serial0:115200n8";
};
dp-connector {
compatible = "dp-connector";
label = "DP";
type = "mini";
hpd-gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
port {
dp_connector_in: endpoint {
remote-endpoint = <&mdss_edp_out>;
};
};
};
reserved-memory {
xbl_mem: xbl@80700000 {
reg = <0x0 0x80700000 0x0 0x100000>;
@@ -121,6 +134,49 @@ debug_vm_mem: debug-vm@d0600000 {
};
};
pmic-glink {
compatible = "qcom,qcm6490-pmic-glink", "qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;
connector@0 {
compatible = "usb-c-connector";
reg = <0>;
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
pmic_glink_hs_in: endpoint {
remote-endpoint = <&usb_1_dwc3_hs>;
};
};
port@1 {
reg = <1>;
pmic_glink_ss_in: endpoint {
remote-endpoint = <&redriver_usb_con_ss>;
};
};
port@2 {
reg = <2>;
pmic_glink_sbu_in: endpoint {
remote-endpoint = <&redriver_usb_con_sbu>;
};
};
};
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
@@ -153,129 +209,154 @@ regulators-0 {
vdd-l14-l16-supply = <&vreg_s8b_1p272>;
vreg_s1b_1p872: smps1 {
regulator-name = "vreg_s1b_1p872";
regulator-min-microvolt = <1840000>;
regulator-max-microvolt = <2040000>;
};
vreg_s2b_0p876: smps2 {
regulator-name = "vreg_s2b_0p876";
regulator-min-microvolt = <570070>;
regulator-max-microvolt = <1050000>;
};
vreg_s7b_0p972: smps7 {
regulator-name = "vreg_s7b_0p972";
regulator-min-microvolt = <535000>;
regulator-max-microvolt = <1120000>;
};
vreg_s8b_1p272: smps8 {
regulator-name = "vreg_s8b_1p272";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1500000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>;
};
vreg_l1b_0p912: ldo1 {
regulator-name = "vreg_l1b_0p912";
regulator-min-microvolt = <825000>;
regulator-max-microvolt = <925000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2b_3p072: ldo2 {
regulator-name = "vreg_l2b_3p072";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3b_0p504: ldo3 {
regulator-name = "vreg_l3b_0p504";
regulator-min-microvolt = <312000>;
regulator-max-microvolt = <910000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4b_0p752: ldo4 {
regulator-name = "vreg_l4b_0p752";
regulator-min-microvolt = <752000>;
regulator-max-microvolt = <820000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
reg_l5b_0p752: ldo5 {
regulator-name = "reg_l5b_0p752";
regulator-min-microvolt = <552000>;
regulator-max-microvolt = <832000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6b_1p2: ldo6 {
regulator-name = "vreg_l6b_1p2";
regulator-min-microvolt = <1140000>;
regulator-max-microvolt = <1260000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7b_2p952: ldo7 {
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3544000>;
regulator-name = "vreg_l7b_2p952";
regulator-min-microvolt = <2952000>;
regulator-max-microvolt = <2952000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8b_0p904: ldo8 {
regulator-name = "vreg_l8b_0p904";
regulator-min-microvolt = <870000>;
regulator-max-microvolt = <970000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9b_1p2: ldo9 {
regulator-name = "vreg_l9b_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1304000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11b_1p504: ldo11 {
regulator-name = "vreg_l11b_1p504";
regulator-min-microvolt = <1504000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12b_0p751: ldo12 {
regulator-name = "vreg_l12b_0p751";
regulator-min-microvolt = <751000>;
regulator-max-microvolt = <824000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13b_0p53: ldo13 {
regulator-name = "vreg_l13b_0p53";
regulator-min-microvolt = <530000>;
regulator-max-microvolt = <824000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l14b_1p08: ldo14 {
regulator-name = "vreg_l14b_1p08";
regulator-min-microvolt = <1080000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l15b_0p765: ldo15 {
regulator-name = "vreg_l15b_0p765";
regulator-min-microvolt = <765000>;
regulator-max-microvolt = <1020000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l16b_1p1: ldo16 {
regulator-name = "vreg_l16b_1p1";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17b_1p7: ldo17 {
regulator-name = "vreg_l17b_1p7";
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l18b_1p8: ldo18 {
regulator-name = "vreg_l18b_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l19b_1p8: ldo19 {
regulator-name = "vreg_l19b_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -304,109 +385,128 @@ regulators-1 {
vdd-bob-supply = <&vph_pwr>;
vreg_s1c_2p19: smps1 {
regulator-name = "vreg_s1c_2p19";
regulator-min-microvolt = <2190000>;
regulator-max-microvolt = <2210000>;
};
vreg_s2c_0p752: smps2 {
regulator-name = "vreg_s2c_0p752";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <800000>;
};
vreg_s5c_0p752: smps5 {
regulator-name = "vreg_s5c_0p752";
regulator-min-microvolt = <465000>;
regulator-max-microvolt = <1050000>;
};
vreg_s7c_0p752: smps7 {
regulator-name = "vreg_s7c_0p752";
regulator-min-microvolt = <465000>;
regulator-max-microvolt = <800000>;
};
vreg_s9c_1p084: smps9 {
regulator-name = "vreg_s9c_1p084";
regulator-min-microvolt = <1010000>;
regulator-max-microvolt = <1170000>;
};
vreg_l1c_1p8: ldo1 {
regulator-name = "vreg_l1c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1980000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2c_1p62: ldo2 {
regulator-name = "vreg_l2c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <1980000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3c_2p8: ldo3 {
regulator-name = "vreg_l3c_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3540000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4c_1p62: ldo4 {
regulator-name = "vreg_l4c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5c_1p62: ldo5 {
regulator-name = "vreg_l5c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6c_2p96: ldo6 {
regulator-name = "vreg_l6c_2p96";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c_3p0: ldo7 {
regulator-name = "vreg_l7c_3p0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8c_1p62: ldo8 {
regulator-name = "vreg_l8c_1p62";
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9c_2p96: ldo9 {
regulator-name = "vreg_l9c_2p96";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <35440000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_0p88: ldo10 {
regulator-name = "vreg_l10c_0p88";
regulator-min-microvolt = <720000>;
regulator-max-microvolt = <1050000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11c_2p8: ldo11 {
regulator-name = "vreg_l11c_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12c_1p65: ldo12 {
regulator-name = "vreg_l12c_1p65";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13c_2p7: ldo13 {
regulator-name = "vreg_l13c_2p7";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_bob_3p296: bob {
regulator-name = "vreg_bob_3p296";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3960000>;
};
@@ -430,10 +530,102 @@ &gcc {
<GCC_WPSS_RSCP_CLK>;
};
&i2c1 {
status = "okay";
typec-mux@1c {
compatible = "onnn,nb7vpq904m";
reg = <0x1c>;
vcc-supply = <&vreg_l18b_1p8>;
retimer-switch;
orientation-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
redriver_usb_con_ss: endpoint {
remote-endpoint = <&pmic_glink_ss_in>;
};
};
port@1 {
reg = <1>;
redriver_phy_con_ss: endpoint {
remote-endpoint = <&usb_dp_qmpphy_out>;
data-lanes = <0 1 2 3>;
};
};
port@2 {
reg = <2>;
redriver_usb_con_sbu: endpoint {
remote-endpoint = <&pmic_glink_sbu_in>;
};
};
};
};
};
&mdss {
status = "okay";
};
&mdss_dp {
status = "okay";
};
&mdss_dp_out {
data-lanes = <0 1>;
remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
&mdss_edp {
status = "okay";
};
&mdss_edp_out {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
remote-endpoint = <&dp_connector_in>;
};
&mdss_edp_phy {
status = "okay";
};
&qupv3_id_0 {
status = "okay";
};
&remoteproc_adsp {
firmware-name = "qcom/qcs6490/adsp.mbn";
status = "okay";
};
&remoteproc_cdsp {
firmware-name = "qcom/qcs6490/cdsp.mbn";
status = "okay";
};
&remoteproc_mpss {
firmware-name = "qcom/qcs6490/modem.mdt";
status = "okay";
};
&remoteproc_wpss {
firmware-name = "qcom/qcs6490/wpss.mbn";
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <32 2>, /* ADSP */
<48 4>; /* NFC */
@@ -449,7 +641,16 @@ &usb_1 {
};
&usb_1_dwc3 {
dr_mode = "peripheral";
dr_mode = "otg";
usb-role-switch;
};
&usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
&usb_1_dwc3_ss {
remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
&usb_1_hsphy {
@@ -464,9 +665,49 @@ &usb_1_qmpphy {
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p912>;
orientation-switch;
status = "okay";
};
&usb_dp_qmpphy_out {
remote-endpoint = <&redriver_phy_con_ss>;
};
&usb_dp_qmpphy_usb_ss_in {
remote-endpoint = <&usb_1_dwc3_ss>;
};
&usb_dp_qmpphy_dp_in {
remote-endpoint = <&mdss_dp_out>;
};
&ufs_mem_hc {
reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l7b_2p952>;
vcc-max-microamp = <800000>;
vccq-supply = <&vreg_l9b_1p2>;
vccq-max-microamp = <900000>;
vccq2-supply = <&vreg_l9b_1p2>;
vccq2-max-microamp = <900000>;
status = "okay";
};
&ufs_mem_phy {
vdda-phy-supply = <&vreg_l10c_0p88>;
vdda-pll-supply = <&vreg_l6b_1p2>;
status = "okay";
};
&wifi {
memory-region = <&wlan_fw_mem>;
};
/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
&edp_hot_plug_det {
function = "gpio";
bias-disable;
};

61
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
View File

@@ -262,6 +262,46 @@ &pm4125_resin {
status = "okay";
};
&pm4125_typec {
status = "okay";
connector {
compatible = "usb-c-connector";
power-role = "dual";
data-role = "dual";
self-powered;
typec-power-opmode = "default";
pd-disable;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
pm4125_hs_in: endpoint {
remote-endpoint = <&usb_dwc3_hs>;
};
};
port@1 {
reg = <1>;
pm4125_ss_in: endpoint {
remote-endpoint = <&usb_qmpphy_out>;
};
};
};
};
};
&pm4125_vbus {
regulator-min-microamp = <500000>;
regulator-max-microamp = <500000>;
status = "okay";
};
&qupv3_id_0 {
status = "okay";
};
@@ -535,14 +575,8 @@ &usb {
status = "okay";
};
&usb_qmpphy {
vdda-phy-supply = <&pm4125_l12>;
vdda-pll-supply = <&pm4125_l13>;
status = "okay";
};
&usb_dwc3 {
dr_mode = "host";
&usb_dwc3_hs {
remote-endpoint = <&pm4125_hs_in>;
};
&usb_hsphy {
@@ -552,12 +586,23 @@ &usb_hsphy {
status = "okay";
};
&usb_qmpphy {
vdda-phy-supply = <&pm4125_l12>;
vdda-pll-supply = <&pm4125_l13>;
status = "okay";
};
&usb_qmpphy_out {
remote-endpoint = <&pm4125_ss_in>;
};
&wifi {
vdd-0.8-cx-mx-supply = <&pm4125_l7>;
vdd-1.8-xo-supply = <&pm4125_l13>;
vdd-1.3-rfa-supply = <&pm4125_l10>;
vdd-3.3-ch0-supply = <&pm4125_l22>;
qcom,ath10k-calibration-variant = "Thundercomm_RB1";
firmware-name = "qcm2290";
status = "okay";
};

1
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
View File

@@ -678,6 +678,7 @@ &wifi {
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l23a_3p3>;
qcom,ath10k-calibration-variant = "Thundercomm_RB2";
firmware-name = "qrb4210";
status = "okay";
};

2
arch/arm64/boot/dts/qcom/sa8155p-adp.dts
View File

@@ -283,7 +283,7 @@ vreg_l12c_1p808: ldo12 {
vreg_l13c_2p96: ldo13 {
regulator-name = "vreg_l13c_2p96";
regulator-min-microvolt = <2504000>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};

20
arch/arm64/boot/dts/qcom/sa8775p.dtsi
View File

@@ -3677,6 +3677,16 @@ pcie0: pcie@1c00000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c04000 {
@@ -3777,6 +3787,16 @@ pcie1: pcie@1c10000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c14000 {

1
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
View File

@@ -1167,6 +1167,7 @@ &pm6150_gpios {
};
&pm6150l_gpios {
status = "disabled"; /* No GPIOs are consumed or configured */
gpio-line-names = "AP_SUSPEND",
"",
"",

10
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@@ -1585,9 +1585,12 @@ ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sc7180-qmp-ufs-phy",
"qcom,sm7150-qmp-ufs-phy";
reg = <0 0x01d87000 0 0x1000>;
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
clock-names = "ref", "ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
<&gcc GCC_UFS_MEM_CLKREF_CLK>;
clock-names = "ref",
"ref_aux",
"qref";
power-domains = <&gcc UFS_PHY_GDSC>;
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
@@ -2309,6 +2312,7 @@ dma@10a2000 {
compatible = "qcom,sc7180-dcc", "qcom,dcc";
reg = <0x0 0x010a2000 0x0 0x1000>,
<0x0 0x010ae000 0x0 0x2000>;
status = "disabled";
};
stm@6002000 {

24
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@@ -2273,6 +2273,16 @@ pcie1: pcie@1c08000 {
<0x100 &apps_smmu 0x1c81 0x1>;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0e000 {
@@ -2352,6 +2362,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<0 0>,
<0 0>,
<0 0>;
qcom,ice = <&ice>;
status = "disabled";
};
@@ -2374,6 +2386,13 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
ice: crypto@1d88000 {
compatible = "qcom,sc7280-inline-crypto-engine",
"qcom,inline-crypto-engine";
reg = <0 0x01d88000 0 0x8000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
};
cryptobam: dma-controller@1dc4000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x0 0x01dc4000 0x0 0x28000>;
@@ -4458,6 +4477,11 @@ opp-506666667 {
opp-hz = /bits/ 64 <506666667>;
required-opps = <&rpmhpd_opp_nom>;
};
opp-608000000 {
opp-hz = /bits/ 64 <608000000>;
required-opps = <&rpmhpd_opp_turbo>;
};
};
};

59
arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
View File

@@ -51,6 +51,8 @@ pmic-glink {
#address-cells = <1>;
#size-cells = <0>;
orientation-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>,
<&tlmm 58 GPIO_ACTIVE_HIGH>;
connector@0 {
compatible = "usb-c-connector";
@@ -329,12 +331,18 @@ vreg_l7e_1p8: ldo7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l10e_2p9: ldo10 {
regulator-min-microvolt = <2904000>;
regulator-max-microvolt = <2904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l16e_3p0: ldo16 {
@@ -350,49 +358,58 @@ &gpu {
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
firmware-name = "qcom/sc8180x/LENOVO/82AK/qcdxkmsuc8180.mbn";
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-0 = <&i2c1_active>, <&i2c1_hid_active>;
pinctrl-0 = <&i2c1_active>;
pinctrl-names = "default";
status = "okay";
hid@10 {
touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&ts_int_default>;
pinctrl-names = "default";
};
};
&i2c7 {
clock-frequency = <100000>;
clock-frequency = <1000000>;
pinctrl-0 = <&i2c7_active>, <&i2c7_hid_active>;
pinctrl-0 = <&i2c7_active>;
pinctrl-names = "default";
status = "okay";
hid@5 {
keyboard@5 {
compatible = "hid-over-i2c";
reg = <0x5>;
hid-descr-addr = <0x20>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&kb_int_default>;
pinctrl-names = "default";
};
hid@2c {
touchpad@2c {
compatible = "hid-over-i2c";
reg = <0x2c>;
hid-descr-addr = <0x20>;
interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&tp_int_default>;
pinctrl-names = "default";
};
};
@@ -669,14 +686,6 @@ i2c1_active: i2c1-active-state {
drive-strength = <2>;
};
i2c1_hid_active: i2c1-hid-active-state {
pins = "gpio122";
function = "gpio";
bias-pull-up;
drive-strength = <2>;
};
i2c7_active: i2c7-active-state {
pins = "gpio98", "gpio99";
function = "qup7";
@@ -685,8 +694,8 @@ i2c7_active: i2c7-active-state {
drive-strength = <2>;
};
i2c7_hid_active: i2c7-hid-active-state {
pins = "gpio37", "gpio24";
kb_int_default: kb-int-default-state {
pins = "gpio37";
function = "gpio";
bias-pull-up;
@@ -718,6 +727,22 @@ wake-n-pins {
};
};
tp_int_default: tp-int-default-state {
pins = "gpio24";
function = "gpio";
bias-pull-up;
drive-strength = <2>;
};
ts_int_default: ts-int-default-state {
pins = "gpio122";
function = "gpio";
bias-pull-up;
drive-strength = <2>;
};
usbprim_sbu_default: usbprim-sbu-state {
oe-n-pins {
pins = "gpio152";

53
arch/arm64/boot/dts/qcom/sc8180x.dtsi
View File

@@ -1777,6 +1777,16 @@ pcie0: pcie@1c00000 {
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -1888,6 +1898,16 @@ pcie3: pcie@1c08000 {
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie3_phy: phy@1c0c000 {
@@ -2000,6 +2020,16 @@ pcie1: pcie@1c10000 {
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c16000 {
@@ -2112,6 +2142,16 @@ pcie2: pcie@1c18000 {
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie2_phy: phy@1c1c000 {
@@ -2225,7 +2265,6 @@ tcsr_mutex: hwlock@1f40000 {
gpu: gpu@2c00000 {
compatible = "qcom,adreno-680.1", "qcom,adreno";
#stream-id-cells = <16>;
reg = <0 0x02c00000 0 0x40000>;
reg-names = "kgsl_3d0_reg_memory";
@@ -2805,7 +2844,7 @@ mdss_mdp: mdp@ae01000 {
power-domains = <&rpmhpd SC8180X_MMCX>;
interrupt-parent = <&mdss>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <0>;
ports {
#address-cells = <1>;
@@ -2878,7 +2917,7 @@ mdss_dsi0: dsi@ae94000 {
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <4>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
@@ -2964,7 +3003,7 @@ mdss_dsi1: dsi@ae96000 {
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <5>;
clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
<&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
@@ -3030,7 +3069,8 @@ mdss_dp0: displayport-controller@ae90000 {
reg = <0 0xae90000 0 0x200>,
<0 0xae90200 0 0x200>,
<0 0xae90400 0 0x600>,
<0 0xae90a00 0 0x400>;
<0 0xae90a00 0 0x400>,
<0 0xae91000 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
@@ -3106,7 +3146,8 @@ mdss_dp1: displayport-controller@ae98000 {
reg = <0 0xae98000 0 0x200>,
<0 0xae98200 0 0x200>,
<0 0xae98400 0 0x600>,
<0 0xae98a00 0 0x400>;
<0 0xae98a00 0 0x400>,
<0 0xae99000 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <13>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,

22
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
View File

@@ -100,6 +100,8 @@ pmic-glink {
#address-cells = <1>;
#size-cells = <0>;
orientation-gpios = <&tlmm 166 GPIO_ACTIVE_HIGH>,
<&tlmm 49 GPIO_ACTIVE_HIGH>;
connector@0 {
compatible = "usb-c-connector";
@@ -731,22 +733,14 @@ &pcie4 {
pinctrl-0 = <&pcie4_default>;
status = "okay";
};
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
&pcie4_port0 {
wifi@0 {
compatible = "pci17cb,1103";
reg = <0x10000 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
wifi@0 {
compatible = "pci17cb,1103";
reg = <0x10000 0x0 0x0 0x0 0x0>;
qcom,ath11k-calibration-variant = "LE_X13S";
};
qcom,ath11k-calibration-variant = "LE_X13S";
};
};

110
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View File

@@ -50,7 +50,8 @@ CPU0: cpu@0 {
reg = <0x0 0x0>;
clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
capacity-dmips-mhz = <981>;
dynamic-power-coefficient = <549>;
next-level-cache = <&L2_0>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
@@ -77,7 +78,8 @@ CPU1: cpu@100 {
reg = <0x0 0x100>;
clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
capacity-dmips-mhz = <981>;
dynamic-power-coefficient = <549>;
next-level-cache = <&L2_100>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
@@ -99,7 +101,8 @@ CPU2: cpu@200 {
reg = <0x0 0x200>;
clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
capacity-dmips-mhz = <981>;
dynamic-power-coefficient = <549>;
next-level-cache = <&L2_200>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
@@ -121,7 +124,8 @@ CPU3: cpu@300 {
reg = <0x0 0x300>;
clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
capacity-dmips-mhz = <981>;
dynamic-power-coefficient = <549>;
next-level-cache = <&L2_300>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
@@ -144,6 +148,7 @@ CPU4: cpu@400 {
clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <590>;
next-level-cache = <&L2_400>;
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
@@ -166,6 +171,7 @@ CPU5: cpu@500 {
clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <590>;
next-level-cache = <&L2_500>;
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
@@ -188,6 +194,7 @@ CPU6: cpu@600 {
clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <590>;
next-level-cache = <&L2_600>;
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
@@ -210,6 +217,7 @@ CPU7: cpu@700 {
clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <590>;
next-level-cache = <&L2_700>;
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
@@ -300,6 +308,7 @@ firmware {
scm: scm {
compatible = "qcom,scm-sc8280xp", "qcom,scm";
interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
qcom,dload-mode = <&tcsr 0x13000>;
};
};
@@ -862,6 +871,18 @@ ipcc: mailbox@408000 {
#mbox-cells = <2>;
};
qfprom: efuse@784000 {
compatible = "qcom,sc8280xp-qfprom", "qcom,qfprom";
reg = <0 0x00784000 0 0x3000>;
#address-cells = <1>;
#size-cells = <1>;
gpu_speed_bin: gpu-speed-bin@18b {
reg = <0x18b 0x1>;
bits = <5 3>;
};
};
qup2: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x008c0000 0 0x2000>;
@@ -1731,6 +1752,8 @@ pcie4: pcie@1c00000 {
linux,pci-domain = <6>;
num-lanes = <1>;
msi-map = <0x0 &its 0xe0000 0x10000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
@@ -1774,11 +1797,22 @@ pcie4: pcie@1c00000 {
reset-names = "pci";
power-domains = <&gcc PCIE_4_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
phys = <&pcie4_phy>;
phy-names = "pciephy";
status = "disabled";
pcie4_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie4_phy: phy@1c06000 {
@@ -1831,6 +1865,8 @@ pcie3b: pcie@1c08000 {
linux,pci-domain = <5>;
num-lanes = <2>;
msi-map = <0x0 &its 0xd0000 0x10000>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
@@ -1872,11 +1908,22 @@ pcie3b: pcie@1c08000 {
reset-names = "pci";
power-domains = <&gcc PCIE_3B_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
phys = <&pcie3b_phy>;
phy-names = "pciephy";
status = "disabled";
pcie3b_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie3b_phy: phy@1c0e000 {
@@ -1929,6 +1976,8 @@ pcie3a: pcie@1c10000 {
linux,pci-domain = <4>;
num-lanes = <4>;
msi-map = <0x0 &its 0xc0000 0x10000>;
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
@@ -1970,11 +2019,22 @@ pcie3a: pcie@1c10000 {
reset-names = "pci";
power-domains = <&gcc PCIE_3A_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
phys = <&pcie3a_phy>;
phy-names = "pciephy";
status = "disabled";
pcie3a_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie3a_phy: phy@1c14000 {
@@ -2030,6 +2090,8 @@ pcie2b: pcie@1c18000 {
linux,pci-domain = <3>;
num-lanes = <2>;
msi-map = <0x0 &its 0xb0000 0x10000>;
interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
@@ -2071,11 +2133,22 @@ pcie2b: pcie@1c18000 {
reset-names = "pci";
power-domains = <&gcc PCIE_2B_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
phys = <&pcie2b_phy>;
phy-names = "pciephy";
status = "disabled";
pcie2b_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie2b_phy: phy@1c1e000 {
@@ -2128,6 +2201,8 @@ pcie2a: pcie@1c20000 {
linux,pci-domain = <2>;
num-lanes = <4>;
msi-map = <0x0 &its 0xa0000 0x10000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>,
@@ -2169,11 +2244,22 @@ pcie2a: pcie@1c20000 {
reset-names = "pci";
power-domains = <&gcc PCIE_2A_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
phys = <&pcie2a_phy>;
phy-names = "pciephy";
status = "disabled";
pcie2a_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie2a_phy: phy@1c24000 {
@@ -3361,10 +3447,12 @@ usb_0: usb@a6f8800 {
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
@@ -3421,10 +3509,12 @@ usb_1: usb@a8f8800 {
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 12 IRQ_TYPE_EDGE_BOTH>,
<&pdc 13 IRQ_TYPE_EDGE_BOTH>,
<&pdc 136 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
@@ -4448,6 +4538,11 @@ tsens0: thermal-sensor@c263000 {
#thermal-sensor-cells = <1>;
};
restart@c264000 {
compatible = "qcom,pshold";
reg = <0 0x0c264000 0 0x4>;
};
tsens1: thermal-sensor@c265000 {
compatible = "qcom,sc8280xp-tsens", "qcom,tsens-v2";
reg = <0 0x0c265000 0 0x1ff>, /* TM */
@@ -4799,7 +4894,7 @@ intc: interrupt-controller@17a00000 {
#size-cells = <2>;
ranges;
msi-controller@17a40000 {
its: msi-controller@17a40000 {
compatible = "arm,gic-v3-its";
reg = <0 0x17a40000 0 0x20000>;
msi-controller;
@@ -4966,6 +5061,11 @@ cpufreq_hw: cpufreq@18591000 {
<0 0x18592000 0 0x1000>;
reg-names = "freq-domain0", "freq-domain1";
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dcvsh-irq-0",
"dcvsh-irq-1";
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";

9
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
View File

@@ -90,6 +90,8 @@ cam_vana_rear_vreg: cam-vana-rear-regulator {
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default>;
pinctrl-names = "default";
key-camera-focus {
label = "Camera Focus";
@@ -645,6 +647,13 @@ ts_lcd_id_active: ts-lcd-id-active-state {
bias-disable;
};
gpio_keys_default: gpio-keys-default-state {
pins = "gpio64", "gpio113";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
imx300_vana_default: imx300-vana-default-state {
pins = "gpio50";
function = "gpio";

31
arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
View File

@@ -116,6 +116,33 @@ led@3 {
};
};
&pmi632_typec {
status = "okay";
connector {
compatible = "usb-c-connector";
power-role = "dual";
data-role = "dual";
self-powered;
typec-power-opmode = "default";
pd-disable;
port {
pmi632_hs_in: endpoint {
remote-endpoint = <&usb_dwc3_hs>;
};
};
};
};
&pmi632_vbus {
regulator-min-microamp = <500000>;
regulator-max-microamp = <1000000>;
status = "okay";
};
&sdhc_1 {
status = "okay";
vmmc-supply = <&pm8953_l8>;
@@ -240,8 +267,8 @@ &usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
&usb_dwc3_hs {
remote-endpoint = <&pmi632_hs_in>;
};
&wcnss {

64
arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts
View File

@@ -441,6 +441,47 @@ rmi4-f12@12 {
};
};
&mdss {
status = "okay";
};
&mdss_dsi0 {
vdda-supply = <&vreg_l1a_1p225>;
status = "okay";
panel@0 {
compatible = "samsung,s6e3fa7-ams559nk06";
reg = <0>;
reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&panel_default>;
power-supply = <&vreg_l6b_3p3>;
port {
panel_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
};
&mdss_dsi0_out {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
vdds-supply = <&vreg_l1b_0p925>;
status = "okay";
};
&mdss_mdp {
status = "okay";
};
&pm660l_gpios {
vol_up_pin: vol-up-state {
pins = "gpio7";
@@ -481,6 +522,29 @@ &sdhc_1 {
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
panel_default: panel-default-state {
te-pins {
pins = "gpio10";
function = "mdp_vsync";
drive-strength = <2>;
bias-pull-down;
};
reset-pins {
pins = "gpio75";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
mode-pins {
pins = "gpio76";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
touchscreen_default: ts-default-state {
ts-reset-pins {
pins = "gpio99";

6
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View File

@@ -195,6 +195,12 @@ pcie0_3p3v_dual: vldo-3v3-regulator {
gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
enable-active-high;
/*
* FIXME: this regulator is responsible for VBUS on the left USB
* port. Keep it always on until we can correctly model this
* relationship.
*/
regulator-always-on;
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pwren_state>;

20
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@@ -2375,6 +2375,16 @@ pcie0: pcie@1c00000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -2479,6 +2489,16 @@ pcie1: pcie@1c08000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0a000 {

2
arch/arm64/boot/dts/qcom/sdx75.dtsi
View File

@@ -411,7 +411,7 @@ smem: qcom,smem {
hwlocks = <&tcsr_mutex 3>;
};
soc: soc {
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;

119
arch/arm64/boot/dts/qcom/sm6350.dtsi
View File

@@ -1205,6 +1205,37 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
cryptobam: dma-controller@1dc4000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0 0x01dc4000 0 0x24000>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
qcom,ee = <0>;
qcom,controlled-remotely;
num-channels = <16>;
qcom,num-ees = <4>;
iommus = <&apps_smmu 0x426 0x11>,
<&apps_smmu 0x432 0x0>,
<&apps_smmu 0x436 0x11>,
<&apps_smmu 0x438 0x1>,
<&apps_smmu 0x43f 0x0>;
};
crypto: crypto@1dfa000 {
compatible = "qcom,sm6350-qce", "qcom,sm8150-qce", "qcom,qce";
reg = <0 0x01dfa000 0 0x6000>;
dmas = <&cryptobam 4>, <&cryptobam 5>;
dma-names = "rx", "tx";
iommus = <&apps_smmu 0x426 0x11>,
<&apps_smmu 0x432 0x0>,
<&apps_smmu 0x436 0x11>,
<&apps_smmu 0x438 0x1>,
<&apps_smmu 0x43f 0x0>;
interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 QCOM_ICC_TAG_ALWAYS
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "memory";
};
ipa: ipa@1e40000 {
compatible = "qcom,sm6350-ipa";
@@ -2033,6 +2064,14 @@ dpu_intf1_out: endpoint {
remote-endpoint = <&mdss_dsi0_in>;
};
};
port@2 {
reg = <2>;
dpu_intf0_out: endpoint {
remote-endpoint = <&mdss_dp_in>;
};
};
};
mdp_opp_table: opp-table {
@@ -2070,6 +2109,86 @@ opp-560000000 {
};
};
mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sm6350-dp", "qcom,sm8350-dp";
reg = <0 0xae90000 0 0x200>,
<0 0xae90200 0 0x200>,
<0 0xae90400 0 0x600>,
<0 0xae91000 0 0x400>,
<0 0xae91400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
"stream_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
phy-names = "dp";
#sound-dai-cells = <0>;
operating-points-v2 = <&dp_opp_table>;
power-domains = <&rpmhpd SM6350_CX>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mdss_dp_in: endpoint {
remote-endpoint = <&dpu_intf0_out>;
};
};
port@1 {
reg = <1>;
mdss_dp_out: endpoint {
};
};
};
dp_opp_table: opp-table {
compatible = "operating-points-v2";
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-270000000 {
opp-hz = /bits/ 64 <270000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-540000000 {
opp-hz = /bits/ 64 <540000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
opp-810000000 {
opp-hz = /bits/ 64 <810000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
};
mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sm6350-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;

16
arch/arm64/boot/dts/qcom/sm8150-hdk.dts
View File

@@ -609,6 +609,11 @@ &remoteproc_cdsp {
firmware-name = "qcom/sm8150/cdsp.mbn";
};
&remoteproc_mpss {
firmware-name = "qcom/sm8150/modem.mbn";
status = "okay";
};
&remoteproc_slpi {
status = "okay";
@@ -713,3 +718,14 @@ &usb_1_dwc3_ss {
&usb_2_dwc3 {
dr_mode = "host";
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l1a_0p75>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l2c_1p3>;
vdd-3.3-ch0-supply = <&vreg_l11c_3p3>;
qcom,ath10k-calibration-variant = "Qualcomm_sm8150hdk";
};

20
arch/arm64/boot/dts/qcom/sm8150.dtsi
View File

@@ -1901,6 +1901,16 @@ pcie0: pcie@1c00000 {
pinctrl-0 = <&pcie0_default_state>;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -2011,6 +2021,16 @@ pcie1: pcie@1c08000 {
pinctrl-0 = <&pcie1_default_state>;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0e000 {

11
arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi
View File

@@ -636,7 +636,8 @@ &pm8150b_typec {
connector {
compatible = "usb-c-connector";
power-role = "source";
op-sink-microwatt = <10000000>;
power-role = "dual";
data-role = "dual";
self-powered;
@@ -645,6 +646,12 @@ PDO_FIXED_DUAL_ROLE |
PDO_FIXED_USB_COMM |
PDO_FIXED_DATA_SWAP)>;
sink-pdos = <PDO_FIXED(5000, 3000,
PDO_FIXED_DUAL_ROLE |
PDO_FIXED_USB_COMM |
PDO_FIXED_DATA_SWAP)
PDO_VAR(5000, 12000, 5000)>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -661,6 +668,8 @@ pm8150b_role_switch_in: endpoint {
};
&pm8150b_vbus {
regulator-min-microamp = <500000>;
regulator-max-microamp = <3000000>;
status = "okay";
};

30
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@@ -2203,6 +2203,16 @@ pcie0: pcie@1c00000 {
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -2318,6 +2328,16 @@ pcie1: pcie@1c08000 {
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0e000 {
@@ -2433,6 +2453,16 @@ pcie2: pcie@1c10000 {
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie2_phy: phy@1c16000 {

1
arch/arm64/boot/dts/qcom/sm8350-hdk.dts
View File

@@ -42,6 +42,7 @@ pmic-glink {
compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;
orientation-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
connector@0 {
compatible = "usb-c-connector";

26
arch/arm64/boot/dts/qcom/sm8350.dtsi
View File

@@ -12,6 +12,7 @@
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/firmware/qcom,scm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,sm8350.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/phy/phy-qcom-qmp.h>
@@ -1572,6 +1573,16 @@ pcie0: pcie@1c00000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -1669,6 +1680,16 @@ pcie1: pcie@1c08000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0e000 {
@@ -1730,6 +1751,11 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "ufs-ddr", "cpu-ufs";
freq-table-hz =
<75000000 300000000>,
<0 0>,

1
arch/arm64/boot/dts/qcom/sm8450-hdk.dts
View File

@@ -95,6 +95,7 @@ pmic-glink {
compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
#address-cells = <1>;
#size-cells = <0>;
orientation-gpios = <&tlmm 91 GPIO_ACTIVE_HIGH>;
connector@0 {
compatible = "usb-c-connector";

8
arch/arm64/boot/dts/qcom/sm8450-qrd.dts
View File

@@ -467,6 +467,14 @@ &usb_1_hsphy {
vdda-pll-supply = <&vreg_l5b_0p88>;
vdda18-supply = <&vreg_l1c_1p8>;
vdda33-supply = <&vreg_l2b_3p07>;
qcom,squelch-detector-bp = <(-2090)>;
qcom,hs-disconnect-bp = <1743>;
qcom,pre-emphasis-amplitude-bp = <40000>;
qcom,pre-emphasis-duration-bp = <20000>;
qcom,hs-amplitude-bp = <2000>;
qcom,hs-output-impedance-micro-ohms = <2600000>;
qcom,hs-crossover-voltage-microvolt = <(-31000)>;
qcom,hs-rise-fall-time-bp = <(-4100)>;
};
&usb_1_qmpphy {

23
arch/arm64/boot/dts/qcom/sm8450.dtsi
View File

@@ -1850,6 +1850,16 @@ pcie0: pcie@1c00000 {
pinctrl-0 = <&pcie0_default_state>;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -1971,6 +1981,16 @@ pcie1: pcie@1c08000 {
pinctrl-0 = <&pcie1_default_state>;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0e000 {
@@ -2363,6 +2383,7 @@ fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "sdsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;
@@ -2665,6 +2686,7 @@ fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "adsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;
@@ -2731,6 +2753,7 @@ fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "cdsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;

779
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts Normal file
View File

@@ -0,0 +1,779 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023, Linaro Limited
*/
/dts-v1/;
#include <dt-bindings/firmware/qcom,scm.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/cs35l45.h>
#include "sm8550.dtsi"
#include "pm8010.dtsi"
#include "pm8550.dtsi"
#include "pm8550b.dtsi"
#define PMK8550VE_SID 5
#include "pm8550ve.dtsi"
#include "pm8550vs.dtsi"
#include "pmk8550.dtsi"
/* TODO: Only one SID of PMR735D seems accessible? */
/delete-node/ &hwfence_shbuf;
/delete-node/ &mpss_mem;
/delete-node/ &rmtfs_mem;
/ {
model = "Sony Xperia 1 V";
compatible = "sony,pdx234", "qcom,sm8550";
chassis-type = "handset";
aliases {
i2c0 = &i2c0;
i2c4 = &i2c4;
i2c10 = &i2c10;
i2c11 = &i2c11;
i2c16 = &i2c_hub_2;
serial0 = &uart7;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
label = "gpio-keys";
pinctrl-0 = <&focus_n &snapshot_n &vol_down_n>;
pinctrl-names = "default";
key-camera-focus {
label = "Camera Focus";
linux,code = <KEY_CAMERA_FOCUS>;
gpios = <&pm8550b_gpios 8 GPIO_ACTIVE_LOW>;
debounce-interval = <15>;
linux,can-disable;
wakeup-source;
};
key-camera-snapshot {
label = "Camera Snapshot";
gpios = <&pm8550b_gpios 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_CAMERA>;
debounce-interval = <15>;
linux,can-disable;
wakeup-source;
};
key-volume-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
debounce-interval = <15>;
linux,can-disable;
wakeup-source;
};
};
pmic-glink {
compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
connector@0 {
compatible = "usb-c-connector";
reg = <0>;
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
pmic_glink_hs_in: endpoint {
remote-endpoint = <&usb_1_dwc3_hs>;
};
};
port@1 {
reg = <1>;
pmic_glink_ss_in: endpoint {
remote-endpoint = <&usb_dp_qmpphy_out>;
};
};
};
};
};
reserved-memory {
mpss_mem: mpss-region@89800000 {
reg = <0x0 0x89800000 0x0 0x10800000>;
no-map;
};
splash@b8000000 {
reg = <0x0 0xb8000000 0x0 0x2b00000>;
no-map;
};
hwfence_shbuf: hwfence-shbuf-region@e6440000 {
reg = <0x0 0xe6440000 0x0 0x2dd000>;
no-map;
};
rmtfs_mem: memory@f8b00000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0xf8b00000 0x0 0x280000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>;
};
ramoops@ffd00000 {
compatible = "ramoops";
reg = <0x0 0xffd00000 0x0 0xc0000>;
console-size = <0x40000>;
record-size = <0x1000>;
pmsg-size = <0x40000>;
ecc-size = <16>;
};
rdtag-store-region@ffdc0000 {
reg = <0x0 0xffdc0000 0x0 0x40000>;
no-map;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
regulator-boot-on;
};
};
&apps_rsc {
regulators-0 {
compatible = "qcom,pm8550-rpmh-regulators";
qcom,pmic-id = "b";
pm8550_bob1: bob1 {
regulator-name = "pm8550_bob1";
regulator-min-microvolt = <3416000>;
regulator-max-microvolt = <3960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
/* TODO: bob2 @ 2.704-3.008V doesn't fall into the vreg driver constraints */
pm8550_l1: ldo1 {
regulator-name = "pm8550_l1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l2: ldo2 {
regulator-name = "pm8550_l2";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
/* L4 exists in cmd-db, but the board seems to crash on access */
pm8550_l5: ldo5 {
regulator-name = "pm8550_l5";
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3104000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l6: ldo6 {
regulator-name = "pm8550_l6";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l7: ldo7 {
regulator-name = "pm8550_l7";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l8: ldo8 {
regulator-name = "pm8550_l8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l9: ldo9 {
regulator-name = "pm8550_l9";
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l10: ldo10 {
regulator-name = "pm8550_l10";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l11: ldo11 {
regulator-name = "pm8550_l11";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l12: ldo12 {
regulator-name = "pm8550_l12";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l13: ldo13 {
regulator-name = "pm8550_l13";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l14: ldo14 {
regulator-name = "pm8550_l14";
regulator-min-microvolt = <3304000>;
regulator-max-microvolt = <3304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l15: ldo15 {
regulator-name = "pm8550_l15";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l16: ldo16 {
regulator-name = "pm8550_l16";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550_l17: ldo17 {
regulator-name = "pm8550_l17";
regulator-min-microvolt = <2504000>;
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
regulators-1 {
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "c";
pm8550vs_0_l1: ldo1 {
regulator-name = "pm8550vs_0_l1";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_0_l3: ldo3 {
regulator-name = "pm8550vs_0_l3";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
regulators-2 {
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "d";
pm8550vs_1_l1: ldo1 {
regulator-name = "pm8550vs_1_l1";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <920000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
/* L3 exists in cmd-db, but the board seems to crash on access */
};
regulators-3 {
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "e";
pm8550vs_2_s4: smps4 {
regulator-name = "pm8550vs_2_s4";
regulator-min-microvolt = <904000>;
regulator-max-microvolt = <984000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_2_s5: smps5 {
regulator-name = "pm8550vs_2_s5";
regulator-min-microvolt = <1010000>;
regulator-max-microvolt = <1120000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_2_l1: ldo1 {
regulator-name = "pm8550vs_2_l1";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_2_l2: ldo2 {
regulator-name = "pm8550vs_2_l2";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <968000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_2_l3: ldo3 {
regulator-name = "pm8550vs_2_l3";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
regulators-4 {
compatible = "qcom,pm8550ve-rpmh-regulators";
qcom,pmic-id = "f";
pm8550ve_s4: smps4 {
regulator-name = "pm8550ve_s4";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <700000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550ve_l1: ldo1 {
regulator-name = "pm8550ve_l1";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550ve_l2: ldo2 {
regulator-name = "pm8550ve_l2";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550ve_l3: ldo3 {
regulator-name = "pm8550ve_l3";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
regulators-5 {
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "g";
pm8550vs_3_s1: smps1 {
regulator-name = "pm8550vs_3_s1";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_s2: smps2 {
regulator-name = "pm8550vs_3_s2";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1036000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_s3: smps3 {
regulator-name = "pm8550vs_3_s3";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1004000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_s4: smps4 {
regulator-name = "pm8550vs_3_s4";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1352000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_s5: smps5 {
regulator-name = "pm8550vs_3_s5";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1004000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_s6: smps6 {
regulator-name = "pm8550vs_3_s6";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_l1: ldo1 {
regulator-name = "pm8550vs_3_l1";
regulator-min-microvolt = <1144000>;
regulator-max-microvolt = <1256000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_l2: ldo2 {
regulator-name = "pm8550vs_3_l2";
regulator-min-microvolt = <1104000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
pm8550vs_3_l3: ldo3 {
regulator-name = "pm8550vs_3_l3";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
/* TODO: Unknown PMIC @ k, l, PM8010 @ m, n */
};
&gpi_dma1 {
status = "okay";
};
&gpi_dma2 {
status = "okay";
};
&i2c_hub_2 {
clock-frequency = <400000>;
status = "okay";
pmic@75 {
compatible = "dlg,slg51000";
reg = <0x75>;
dlg,cs-gpios = <&pm8550vs_g_gpios 4 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&cam_pwr_a_cs>;
pinctrl-names = "default";
regulators {
slg51000_a_ldo1: ldo1 {
regulator-name = "slg51000_a_ldo1";
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3300000>;
};
slg51000_a_ldo2: ldo2 {
regulator-name = "slg51000_a_ldo2";
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3300000>;
};
slg51000_a_ldo3: ldo3 {
regulator-name = "slg51000_a_ldo3";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3750000>;
};
slg51000_a_ldo4: ldo4 {
regulator-name = "slg51000_a_ldo4";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3750000>;
};
slg51000_a_ldo5: ldo5 {
regulator-name = "slg51000_a_ldo5";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1200000>;
};
slg51000_a_ldo6: ldo6 {
regulator-name = "slg51000_a_ldo6";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1200000>;
};
slg51000_a_ldo7: ldo7 {
regulator-name = "slg51000_a_ldo7";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3750000>;
};
};
};
};
&i2c_master_hub_0 {
status = "okay";
};
&i2c0 {
clock-frequency = <1000000>;
status = "okay";
/* NXP NFC @ 28 */
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
/* LX Semi SW82907 touchscreen @ 28 */
};
&i2c10 {
clock-frequency = <1000000>;
status = "okay";
/* Cirrus Logic CS40L25A boosted haptics driver @ 40 */
};
&i2c11 {
clock-frequency = <1000000>;
status = "okay";
cs35l41_l: speaker-amp@30 {
compatible = "cirrus,cs35l45";
reg = <0x30>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 183 GPIO_ACTIVE_HIGH>;
cirrus,asp-sdout-hiz-ctrl = <(CS35L45_ASP_TX_HIZ_UNUSED | CS35L45_ASP_TX_HIZ_DISABLED)>;
#sound-dai-cells = <1>;
cirrus,gpio-ctrl2 {
gpio-ctrl = <0x2>;
};
};
cs35l41_r: speaker-amp@31 {
compatible = "cirrus,cs35l45";
reg = <0x31>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 183 GPIO_ACTIVE_HIGH>;
cirrus,asp-sdout-hiz-ctrl = <(CS35L45_ASP_TX_HIZ_UNUSED | CS35L45_ASP_TX_HIZ_DISABLED)>;
#sound-dai-cells = <1>;
cirrus,gpio-ctrl2 {
gpio-ctrl = <0x2>;
};
};
};
&pcie0 {
wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
status = "okay";
};
&pcie0_phy {
vdda-phy-supply = <&pm8550vs_2_l1>;
vdda-pll-supply = <&pm8550vs_2_l3>;
status = "okay";
};
&pm8550_flash {
status = "okay";
led-0 {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_WHITE>;
led-sources = <1>, <4>;
led-max-microamp = <500000>;
flash-max-microamp = <1000000>;
flash-max-timeout-us = <1280000>;
function-enumerator = <0>;
};
led-1 {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_YELLOW>;
led-sources = <2>, <3>;
led-max-microamp = <500000>;
flash-max-microamp = <1000000>;
flash-max-timeout-us = <1280000>;
function-enumerator = <1>;
};
};
&pm8550_gpios {
vol_down_n: volume-down-n-state {
pins = "gpio6";
function = "normal";
power-source = <1>;
bias-pull-up;
input-enable;
};
sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio12";
function = "normal";
power-source = <1>;
bias-pull-down;
output-disable;
input-enable;
};
};
&pm8550b_gpios {
snapshot_n: snapshot-n-state {
pins = "gpio7";
function = "normal";
power-source = <1>;
bias-pull-up;
input-enable;
};
focus_n: focus-n-state {
pins = "gpio8";
function = "normal";
power-source = <1>;
bias-pull-up;
input-enable;
};
};
&pm8550vs_g_gpios {
cam_pwr_a_cs: cam-pwr-a-cs-state {
pins = "gpio4";
function = "normal";
power-source = <0x01>;
drive-push-pull;
output-low;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
};
};
&pm8550b_eusb2_repeater {
qcom,tune-usb2-disc-thres = /bits/ 8 <0x6>;
qcom,tune-usb2-amplitude = /bits/ 8 <0xf>;
qcom,tune-usb2-preem = /bits/ 8 <0x7>;
vdd18-supply = <&pm8550_l15>;
vdd3-supply = <&pm8550_l5>;
};
&pon_pwrkey {
status = "okay";
};
&pon_resin {
linux,code = <KEY_VOLUMEUP>;
status = "okay";
};
&qupv3_id_0 {
status = "okay";
};
&qupv3_id_1 {
status = "okay";
};
&remoteproc_adsp {
firmware-name = "qcom/sm8550/Sony/yodo/adsp.mbn",
"qcom/sm8550/Sony/yodo/adsp_dtb.mbn";
status = "okay";
};
&remoteproc_cdsp {
firmware-name = "qcom/sm8550/Sony/yodo/cdsp.mbn",
"qcom/sm8550/Sony/yodo/cdsp_dtb.mbn";
status = "okay";
};
&sdhc_2 {
cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
pinctrl-names = "default", "sleep";
vmmc-supply = <&pm8550_l9>;
vqmmc-supply = <&pm8550_l8>;
no-sdio;
no-mmc;
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&tlmm {
gpio-reserved-ranges = <32 8>;
};
&uart7 {
status = "okay";
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
};
&usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
&usb_1_dwc3_ss {
remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
&usb_1_hsphy {
vdd-supply = <&pm8550vs_2_l1>;
vdda12-supply = <&pm8550vs_2_l3>;
phys = <&pm8550b_eusb2_repeater>;
status = "okay";
};
&usb_dp_qmpphy {
vdda-phy-supply = <&pm8550vs_2_l3>;
vdda-pll-supply = <&pm8550ve_l3>;
orientation-switch;
status = "okay";
};
&usb_dp_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
&usb_dp_qmpphy_usb_ss_in {
remote-endpoint = <&usb_1_dwc3_ss>;
};
&xo_board {
clock-frequency = <76800000>;
};

42
arch/arm64/boot/dts/qcom/sm8550.dtsi
View File

@@ -812,6 +812,7 @@ gpi_dma2: dma-controller@800000 {
dma-channels = <12>;
dma-channel-mask = <0x3e>;
iommus = <&apps_smmu 0x436 0>;
dma-coherent;
status = "disabled";
};
@@ -823,6 +824,7 @@ qupv3_id_1: geniqup@8c0000 {
clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
iommus = <&apps_smmu 0x423 0>;
dma-coherent;
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
@@ -1322,6 +1324,7 @@ gpi_dma1: dma-controller@a00000 {
dma-channels = <12>;
dma-channel-mask = <0x1e>;
iommus = <&apps_smmu 0xb6 0>;
dma-coherent;
status = "disabled";
};
@@ -1335,6 +1338,7 @@ qupv3_id_0: geniqup@ac0000 {
iommus = <&apps_smmu 0xa3 0>;
interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>;
interconnect-names = "qup-core";
dma-coherent;
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
@@ -1770,6 +1774,16 @@ pcie0: pcie@1c00000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -1883,6 +1897,16 @@ pcie1: pcie@1c08000 {
phy-names = "pciephy";
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0e000 {
@@ -3227,12 +3251,21 @@ usb_1_dwc3: usb@a600000 {
reg = <0x0 0x0a600000 0x0 0xcd00>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&apps_smmu 0x40 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
phys = <&usb_1_hsphy>,
<&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
snps,hird-threshold = /bits/ 8 <0x0>;
snps,usb2-gadget-lpm-disable;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
snps,is-utmi-l1-suspend;
snps,usb3_lpm_capable;
snps,usb2-lpm-disable;
snps,has-lpm-erratum;
tx-fifo-resize;
dma-coherent;
ports {
#address-cells = <1>;
@@ -3968,6 +4001,7 @@ apps_smmu: iommu@15000000 {
<GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
};
intc: interrupt-controller@17100000 {
@@ -4316,6 +4350,7 @@ fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "adsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;
@@ -4454,6 +4489,7 @@ fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "cdsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm64/boot/dts/qcom/sm8650-mtp.dts
View File

@@ -641,10 +641,6 @@ &mdss_dsi0_phy {
status = "okay";
};
&mdss_mdp {
status = "okay";
};
&pcie_1_phy_aux_clk {
clock-frequency = <1000>;
};

12
arch/arm64/boot/dts/qcom/sm8650-qrd.dts
View File

@@ -766,6 +766,14 @@ &ipa {
status = "okay";
};
&gpu {
status = "okay";
zap-shader {
firmware-name = "qcom/sm8650/gen70900_zap.mbn";
};
};
&lpass_tlmm {
spkr_1_sd_n_active: spkr-1-sd-n-active-state {
pins = "gpio21";
@@ -827,10 +835,6 @@ &mdss_dp0_out {
remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
&mdss_mdp {
status = "okay";
};
&pcie_1_phy_aux_clk {
clock-frequency = <1000>;
};

255
arch/arm64/boot/dts/qcom/sm8650.dtsi
View File

@@ -485,9 +485,9 @@ aop_cmd_db_mem: aop-cmd-db@81c60000 {
no-map;
};
/* Merged aop_config, tme_crash_dump, tme_log and uefi_log regions */
/* Merged aop_config, tme_crash_dump, tme_log, uefi_log, and chipinfo regions */
aop_tme_uefi_merged_mem: aop-tme-uefi-merged@81c80000 {
reg = <0 0x81c80000 0 0x74000>;
reg = <0 0x81c80000 0 0x75000>;
no-map;
};
@@ -2294,6 +2294,16 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
dma-coherent;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie0_phy: phy@1c06000 {
@@ -2422,6 +2432,16 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<0x02000000 0 0x40300000 0 0x40300000 0 0x1fd00000>;
status = "disabled";
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
pcie1_phy: phy@1c0e000 {
@@ -2591,6 +2611,143 @@ tcsr: clock-controller@1fc0000 {
#reset-cells = <1>;
};
gpu: gpu@3d00000 {
compatible = "qcom,adreno-43051401", "qcom,adreno";
reg = <0x0 0x03d00000 0x0 0x40000>,
<0x0 0x03d9e000 0x0 0x1000>,
<0x0 0x03d61000 0x0 0x800>;
reg-names = "kgsl_3d0_reg_memory",
"cx_mem",
"cx_dbgc";
interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&adreno_smmu 0 0x0>,
<&adreno_smmu 1 0x0>;
operating-points-v2 = <&gpu_opp_table>;
qcom,gmu = <&gmu>;
status = "disabled";
zap-shader {
memory-region = <&gpu_micro_code_mem>;
};
/* Speedbin needs more work on A740+, keep only lower freqs */
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-231000000 {
opp-hz = /bits/ 64 <231000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
};
opp-310000000 {
opp-hz = /bits/ 64 <310000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
};
opp-366000000 {
opp-hz = /bits/ 64 <366000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
};
opp-422000000 {
opp-hz = /bits/ 64 <422000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
};
opp-578000000 {
opp-hz = /bits/ 64 <578000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
};
opp-629000000 {
opp-hz = /bits/ 64 <629000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
};
opp-680000000 {
opp-hz = /bits/ 64 <680000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
};
opp-720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
};
opp-770000000 {
opp-hz = /bits/ 64 <770000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
};
opp-834000000 {
opp-hz = /bits/ 64 <834000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
};
};
};
gmu: gmu@3d6a000 {
compatible = "qcom,adreno-gmu-750.1", "qcom,adreno-gmu";
reg = <0x0 0x03d6a000 0x0 0x35000>,
<0x0 0x03d50000 0x0 0x10000>,
<0x0 0x0b280000 0x0 0x10000>;
reg-names = "gmu", "rscc", "gmu_pdc";
interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hfi", "gmu";
clocks = <&gpucc GPU_CC_AHB_CLK>,
<&gpucc GPU_CC_CX_GMU_CLK>,
<&gpucc GPU_CC_CXO_CLK>,
<&gcc GCC_DDRSS_GPU_AXI_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
<&gpucc GPU_CC_HUB_CX_INT_CLK>,
<&gpucc GPU_CC_DEMET_CLK>;
clock-names = "ahb",
"gmu",
"cxo",
"axi",
"memnoc",
"hub",
"demet";
power-domains = <&gpucc GPU_CX_GDSC>,
<&gpucc GPU_GX_GDSC>;
power-domain-names = "cx",
"gx";
iommus = <&adreno_smmu 5 0x0>;
qcom,qmp = <&aoss_qmp>;
operating-points-v2 = <&gmu_opp_table>;
gmu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-260000000 {
opp-hz = /bits/ 64 <260000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
};
opp-625000000 {
opp-hz = /bits/ 64 <625000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
};
};
};
gpucc: clock-controller@3d90000 {
compatible = "qcom,sm8650-gpucc";
reg = <0 0x03d90000 0 0xa000>;
@@ -2604,6 +2761,50 @@ gpucc: clock-controller@3d90000 {
#power-domain-cells = <1>;
};
adreno_smmu: iommu@3da0000 {
compatible = "qcom,sm8650-smmu-500", "qcom,adreno-smmu",
"qcom,smmu-500", "arm,mmu-500";
reg = <0x0 0x03da0000 0x0 0x40000>;
#iommu-cells = <2>;
#global-interrupts = <1>;
interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
<&gpucc GPU_CC_AHB_CLK>;
clock-names = "hlos",
"bus",
"iface",
"ahb";
power-domains = <&gpucc GPU_CX_GDSC>;
dma-coherent;
};
ipa: ipa@3f40000 {
compatible = "qcom,sm8650-ipa", "qcom,sm8550-ipa";
@@ -3584,14 +3785,16 @@ usb_1: usb@a6f8800 {
compatible = "qcom,sm8650-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 14 IRQ_TYPE_EDGE_RISING>,
<&pdc 15 IRQ_TYPE_EDGE_RISING>,
<&pdc 14 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "hs_phy_irq",
"ss_phy_irq",
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
"ss_phy_irq";
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
@@ -4845,6 +5048,8 @@ fastrpc {
label = "adsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;
@@ -5002,6 +5207,8 @@ fastrpc {
label = "cdsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;
@@ -5084,6 +5291,38 @@ compute-cb@8 {
<&apps_smmu 0x19c8 0x0>;
dma-coherent;
};
/* note: secure cb9 in downstream */
compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
iommus = <&apps_smmu 0x196c 0x0>,
<&apps_smmu 0x0c0c 0x20>,
<&apps_smmu 0x19cc 0x0>;
dma-coherent;
};
compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
iommus = <&apps_smmu 0x196d 0x0>,
<&apps_smmu 0x0c0d 0x20>,
<&apps_smmu 0x19cd 0x0>;
dma-coherent;
};
compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <14>;
iommus = <&apps_smmu 0x196e 0x0>,
<&apps_smmu 0x0c0e 0x20>,
<&apps_smmu 0x19ce 0x0>;
dma-coherent;
};
};
};
};

47
arch/arm64/boot/dts/qcom/x1e80100-crd.dts
View File

@@ -9,6 +9,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "x1e80100.dtsi"
#include "x1e80100-pmics.dtsi"
/ {
model = "Qualcomm Technologies, Inc. X1E80100 CRD";
@@ -598,8 +599,6 @@ &mdss_dp3 {
compatible = "qcom,x1e80100-dp";
/delete-property/ #sound-dai-cells;
data-lanes = <0 1 2 3>;
status = "okay";
aux-bus {
@@ -619,6 +618,9 @@ ports {
port@1 {
reg = <1>;
mdss_dp3_out: endpoint {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
remote-endpoint = <&edp_panel_in>;
};
};
@@ -680,16 +682,32 @@ &remoteproc_cdsp {
status = "okay";
};
&smb2360_0_eusb2_repeater {
vdd18-supply = <&vreg_l3d_1p8>;
vdd3-supply = <&vreg_l2b_3p0>;
};
&smb2360_1_eusb2_repeater {
vdd18-supply = <&vreg_l3d_1p8>;
vdd3-supply = <&vreg_l14b_3p0>;
};
&smb2360_2_eusb2_repeater {
vdd18-supply = <&vreg_l3d_1p8>;
vdd3-supply = <&vreg_l8b_3p0>;
};
&swr0 {
status = "okay";
pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
pinctrl-names = "default";
/* WSA8845, Left Woofer */
left_woofer: speaker@0,0 {
compatible = "sdw20217020400";
reg = <0 0>;
pinctrl-0 = <&spkr_01_sd_n_active>;
pinctrl-names = "default";
powerdown-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
sound-name-prefix = "WooferLeft";
vdd-1p8-supply = <&vreg_l15b_1p8>;
@@ -700,8 +718,7 @@ left_woofer: speaker@0,0 {
left_tweeter: speaker@0,1 {
compatible = "sdw20217020400";
reg = <0 1>;
/* pinctrl in left_woofer node because of sharing the GPIO*/
powerdown-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
sound-name-prefix = "TwitterLeft";
vdd-1p8-supply = <&vreg_l15b_1p8>;
@@ -734,13 +751,14 @@ wcd_tx: codec@0,3 {
&swr3 {
status = "okay";
pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;
pinctrl-names = "default";
/* WSA8845, Right Woofer */
right_woofer: speaker@0,0 {
compatible = "sdw20217020400";
reg = <0 0>;
pinctrl-0 = <&spkr_23_sd_n_active>;
pinctrl-names = "default";
powerdown-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
sound-name-prefix = "WooferRight";
vdd-1p8-supply = <&vreg_l15b_1p8>;
@@ -751,8 +769,7 @@ right_woofer: speaker@0,0 {
right_tweeter: speaker@0,1 {
compatible = "sdw20217020400";
reg = <0 1>;
/* pinctrl in right_woofer node because of sharing the GPIO*/
powerdown-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
sound-name-prefix = "TwitterRight";
vdd-1p8-supply = <&vreg_l15b_1p8>;
@@ -817,6 +834,8 @@ &usb_1_ss0_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
phys = <&smb2360_0_eusb2_repeater>;
status = "okay";
};
@@ -837,6 +856,8 @@ &usb_1_ss1_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
phys = <&smb2360_1_eusb2_repeater>;
status = "okay";
};
@@ -857,6 +878,8 @@ &usb_1_ss2_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
phys = <&smb2360_2_eusb2_repeater>;
status = "okay";
};

51
arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi Normal file
View File

@@ -0,0 +1,51 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
};
&spmi_bus1 {
smb2360_0: pmic@7 {
compatible = "qcom,smb2360", "qcom,spmi-pmic";
reg = <0x7 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
smb2360_0_eusb2_repeater: phy@fd00 {
compatible = "qcom,smb2360-eusb2-repeater";
reg = <0xfd00>;
#phy-cells = <0>;
};
};
smb2360_1: pmic@a {
compatible = "qcom,smb2360", "qcom,spmi-pmic";
reg = <0xa SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
smb2360_1_eusb2_repeater: phy@fd00 {
compatible = "qcom,smb2360-eusb2-repeater";
reg = <0xfd00>;
#phy-cells = <0>;
};
};
smb2360_2: pmic@b {
compatible = "qcom,smb2360", "qcom,spmi-pmic";
reg = <0xb SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
smb2360_2_eusb2_repeater: phy@fd00 {
compatible = "qcom,smb2360-eusb2-repeater";
reg = <0xfd00>;
#phy-cells = <0>;
};
};
};

27
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
View File

@@ -9,6 +9,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "x1e80100.dtsi"
#include "x1e80100-pmics.dtsi"
/ {
model = "Qualcomm Technologies, Inc. X1E80100 QCP";
@@ -409,8 +410,6 @@ &mdss_dp3 {
compatible = "qcom,x1e80100-dp";
/delete-property/ #sound-dai-cells;
data-lanes = <0 1 2 3>;
status = "okay";
aux-bus {
@@ -430,6 +429,9 @@ ports {
port@1 {
reg = <1>;
mdss_dp3_out: endpoint {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
remote-endpoint = <&edp_panel_in>;
};
};
@@ -491,6 +493,21 @@ &remoteproc_cdsp {
status = "okay";
};
&smb2360_0_eusb2_repeater {
vdd18-supply = <&vreg_l3d_1p8>;
vdd3-supply = <&vreg_l2b_3p0>;
};
&smb2360_1_eusb2_repeater {
vdd18-supply = <&vreg_l3d_1p8>;
vdd3-supply = <&vreg_l14b_3p0>;
};
&smb2360_2_eusb2_repeater {
vdd18-supply = <&vreg_l3d_1p8>;
vdd3-supply = <&vreg_l8b_3p0>;
};
&tlmm {
gpio-reserved-ranges = <33 3>, /* Unused */
<44 4>, /* SPI (TPM) */
@@ -513,6 +530,8 @@ &usb_1_ss0_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
phys = <&smb2360_0_eusb2_repeater>;
status = "okay";
};
@@ -533,6 +552,8 @@ &usb_1_ss1_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
phys = <&smb2360_1_eusb2_repeater>;
status = "okay";
};
@@ -553,6 +574,8 @@ &usb_1_ss2_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
phys = <&smb2360_2_eusb2_repeater>;
status = "okay";
};

46
arch/arm64/boot/dts/qcom/x1e80100.dtsi
View File

@@ -3088,7 +3088,7 @@ swr1: soundwire@6ad0000 {
qcom,ports-hstart = /bits/ 8 <0xff 0x03 0x00 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-hstop = /bits/ 8 <0xff 0x06 0x0f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
@@ -4095,8 +4095,6 @@ port@0 {
mdss_dp3_in: endpoint {
remote-endpoint = <&mdss_intf5_out>;
link-frequencies = /bits/ 64 <8100000000>;
};
};
@@ -4221,6 +4219,48 @@ aoss_qmp: power-management@c300000 {
#clock-cells = <0>;
};
spmi: arbiter@c400000 {
compatible = "qcom,x1e80100-spmi-pmic-arb";
reg = <0 0x0c400000 0 0x3000>,
<0 0x0c500000 0 0x400000>,
<0 0x0c440000 0 0x80000>;
reg-names = "core", "chnls", "obsrvr";
qcom,ee = <0>;
qcom,channel = <0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
spmi_bus0: spmi@c42d000 {
reg = <0 0x0c42d000 0 0x4000>,
<0 0x0c4c0000 0 0x10000>;
reg-names = "cnfg", "intr";
interrupt-names = "periph_irq";
interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <4>;
#address-cells = <2>;
#size-cells = <0>;
};
spmi_bus1: spmi@c432000 {
reg = <0 0x0c432000 0 0x4000>,
<0 0x0c4d0000 0 0x10000>;
reg-names = "cnfg", "intr";
interrupt-names = "periph_irq";
interrupts-extended = <&pdc 3 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <4>;
#address-cells = <2>;
#size-cells = <0>;
};
};
tlmm: pinctrl@f100000 {
compatible = "qcom,x1e80100-tlmm";