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fd8c0b5adc
Pull StarFive clk driver updates from Conor Dooley: Add support for the System-Top-Group, Image-Signal-Process, Video-Output and PLL clocks on the JH7110 SoC. These drivers come with their associate dt-bindings & the obligatory headers containing defines of clock indices. To maintain backwards compatibility, the PLL driver will fall back to using the fixed factor clocks that were merged for v6.4. The binding has been updated to only permit sourcing the PLL clocks from the PLL's clock controller. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'clk-starfive-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: clk: starfive: Add StarFive JH7110 Video-Output clock driver clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver clk: starfive: Add StarFive JH7110 System-Top-Group clock driver clk: starfive: jh7110-sys: Add PLL clocks source from DTS clk: starfive: Add StarFive JH7110 PLL clock driver dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs dt-bindings: soc: starfive: Add StarFive syscon module dt-bindings: clock: Add StarFive JH7110 PLL clock generator
Linux kernel
============
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