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f4ca7a9260dfe700f2a16f0881825de625067515
1. the frequency of csr clock is 66.5MHz, so the csr_clk value should
be 0 other than 5.
2. the csr_clk can be got from device tree, so remove initialization here.
Fixes: 9992f37e34 ("stmmac: dwmac-mediatek: add support for mt2712")
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Linux kernel
============
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In order to build the documentation, use ``make htmldocs`` or
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Please read the Documentation/process/changes.rst file, as it contains the
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