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Biju Das says: ==================== Add support for RZ/N1 SJA1000 CAN controller This patch series aims to add support for RZ/N1 SJA1000 CAN controller. The SJA1000 CAN controller on RZ/N1 SoC has some differences compared to others like it has no clock divider register (CDR) support and it has no HW loopback (HW doesn't see tx messages on rx), so introduced a new compatible 'renesas,rzn1-sja1000' to handle these differences. v3->v4: * Updated bindings as per coding style used in example-schema. * Entire entry in properties compatible declared as enum. Also Descriptions do not bring any information,so removed it from compatible description. * Used decimal values in nxp,tx-output-mode enums. * Fixed indentaions in binding examples. * Removed clock-names from bindings, as it is single clock. * Optimized the code as per Vincent's suggestion. * Updated clock handling as per bindings. v2->v3: * Added reg-io-width is a required property for technologic,sja1000 & renesas,rzn1-sja1000 * Removed enum type from nxp,tx-output-config and updated the description for combination of TX0 and TX1. * Updated the example for technologic,sja1000 v1->v2: * Moved $ref: can-controller.yaml# to top along with if conditional to avoid multiple mapping issues with the if conditional in the subsequent patch. * Added an example for RZ/N1D SJA1000 usage. * Updated commit description for patch#2,#3 and #6 * Removed the quirk macro SJA1000_NO_HW_LOOPBACK_QUIRK * Added prefix SJA1000_QUIRK_* for quirk macro. * Replaced of_device_get_match_data->device_get_match_data. * Added error handling on clk error path * Started using "devm_clk_get_optional_enabled" for clk get,prepare and enable. Ref: [1] https://lore.kernel.org/linux-renesas-soc/20220701162320.102165-1-biju.das.jz@bp.renesas.com/T/#t ==================== Link: https://lore.kernel.org/all/20220710115248.190280-1-biju.das.jz@bp.renesas.com [mkl: applying patches 1...5 only, as 6 depends devm_clk_get_optional_enabled(), which is not in net-next/master, yet] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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