Neil Armstrong c516beb248 arm64: dts: qcom: sm8650: harmonize all unregulated thermal trip points
While the CPUs thermal is handled by the LMH, and GPU has a passive
cooldowm via the HLOS DCVS, all the other thermal blocks only have
hot and critical and no passive/active trip points.

Passive or active thermal management for those blocks should
be either defined if somehow we can express those in DT or
in the board definition if there's an active cooling device
available.

The tsens MAX_THRESHOLD is set to 120C on those platforms, so set
the hot to 110C to leave a chance to HLOS to react and critical to
115C to avoid the monitor thermal shutdown.

In the case a passive or active cooling device would be
available, the downstream reference implementation uses
the 95C "tj" trip point, as we already use for the
gpuss thermal blocks.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250203-topic-sm8650-thermal-cpu-idle-v4-3-65e35f307301@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-02-25 20:57:25 -06:00
2024-09-01 20:43:24 -07:00
2022-09-28 09:02:20 +02:00
2025-02-02 15:39:26 -08:00
2024-03-18 03:36:32 -06:00

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