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c4ebd66128
RISC-V cache drivers for v6.18 sifive: Reduce the number of fences issued while flushing. Samuel reports that this is approximately a 15% speed-up. ax45mp: Fix the binding so that it permits the cache-sets setting used by the recently added QiLai SoC. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-cache-for-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: cache: sifive_ccache: Optimize cache flushes dt-bindings: cache: ax45mp: add 2048 as a supported cache-sets value Link: https://lore.kernel.org/r/20250924-relenting-aqua-a4a93b89809e@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.