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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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bef9652131
Pull Renesas clk driver updates from Geert Uytterhoeven: - Add GPU and USB2 clocks and resets on Renesas RZ/V2H(P) - Add support for the Renesas RZ/V2N (R9A09G056) SoC - Add GPU clocks and resets on Renesas RZ/G3E * tag 'renesas-clk-for-v6.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (22 commits) clk: renesas: r9a09g057: Add clock and reset entries for USB2 dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP core clocks clk: renesas: rzv2h: Use both CLK_ON and CLK_MON bits for clock state validation clk: renesas: rzv2h: Use str_on_off() helper in rzv2h_mod_clock_endisable() clk: renesas: rzv2h: Support static dividers without RMW clk: renesas: rzv2h: Add macro for defining static dividers clk: renesas: rzv2h: Add support for static mux clocks clk: renesas: r9a09g047: Add clock and reset entries for GE3D clk: renesas: rzv2h: Fix a typo clk: renesas: rzv2h: Add support for RZ/V2N SoC clk: renesas: rzv2h: Sort compatible list based on SoC part number dt-bindings: pinctrl: renesas: Document RZ/V2N SoC dt-bindings: clock: renesas: Document RZ/V2N SoC CPG dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK clk: renesas: rzv2h: Simplify rzv2h_cpg_assert()/rzv2h_cpg_deassert() clk: renesas: rzv2h: Improve rzv2h_ddiv_set_rate() clk: renesas: r9a09g057: Add clock and reset entries for GE3D clk: renesas: rzv2h: Rename PLL field macros for consistency clk: renesas: rzv2h: Add support for enabling PLLs ...
Linux kernel
============
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