Files
linux/drivers
Ville Syrjälä a43d928120 drm/i915/dsi: Gate DSI clocks earlier
The clock gating step is in the wrong spot compared to the
TGL+ bspec sequence. Move it the right place. Windows also
seems to use the TGL+ order here always.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-6-ville.syrjala@linux.intel.com
2023-06-13 19:04:25 +03:00
..
2023-05-12 09:09:06 -06:00
2023-06-13 19:04:25 +03:00
2023-05-09 15:03:40 +02:00