Eric Yang a39a581669 drm/amd/display: fix inputting clk lvl into dml for RN
[Why]
Previous logic is only good for 15W parts. Other configuration
need a smarter logic to match clk levels with pp table in the fuse.

[How]
Cache all 8 DPM level's clock data, find lvl that match each pstate
in the pp table and build input into DML base on that

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-06 15:04:37 -05:00
2020-01-20 11:42:57 +10:00
2019-12-09 10:36:44 -08:00
2020-01-20 11:42:57 +10:00
2020-01-20 11:42:57 +10:00
2020-01-11 14:33:39 -08:00
2019-10-29 04:43:29 -06:00
2020-01-20 11:42:57 +10:00
2020-01-19 16:02:49 -08:00

Linux kernel
============

There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.

In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``.  The formatted documentation can also be read online at:

    https://www.kernel.org/doc/html/latest/

There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.
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