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a19489ca82
The s32g2 and s32g3 NXP platforms have two instances of a Successive Approximation Register ADC. It supports the raw, trigger and scan modes which involves the DMA. Add their descriptions. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>