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linux/Documentation
Daniel Lezcano a19489ca82 dt-bindings: iio: adc: Add the NXP SAR ADC for s32g2/3 platforms
The s32g2 and s32g3 NXP platforms have two instances of a Successive
Approximation Register ADC. It supports the raw, trigger and scan
modes which involves the DMA. Add their descriptions.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-12-21 11:41:12 +00:00
..
2025-11-05 11:23:39 -07:00
2025-12-01 11:53:59 +02:00
2025-10-28 16:01:20 -06:00