Files
linux/drivers
Lad Prabhakar 989d673ff7 clk: renesas: r9a07g044: Add clock and reset entry for DRP-AI
Add clock and reset entries for the DRP-AI block, which is available only
on the Renesas RZ/V2L SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250106202853.262787-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-02-03 11:07:05 +01:00
..
2025-01-29 10:56:11 +01:00
2025-01-10 10:15:04 +01:00
2025-01-18 17:10:05 -08:00
2025-01-18 14:38:49 -06:00
2025-01-20 13:10:15 +01:00