linux

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Files

Jingyi Wang c800e4c8a6 dt-bindings: cache: qcom,llcc: Document Maili SoC

Add documentation for the Last Level Cache Controller (LLCC) bindings
for Qualcomm Maili SoC which is fully compatible with the one found on
Qualcomm Hawi.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260604-maili-llcc-v2-1-dd24f05bc197@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

2026-07-07 21:38:18 -05:00

andestech,ax45mp-cache.yaml

dt-bindings: cache: ax45mp: add 2048 as a supported cache-sets value

2025-08-28 17:34:45 +01:00

freescale-l2cache.txt

dt-bindings: move cache controller bindings to a cache directory

2023-04-04 12:12:13 -05:00

l2c2x0.yaml

dt-bindings: cache: l2c2x0: Add missing power-domains

2026-06-12 09:11:41 -05:00

marvell,kirkwood-cache.yaml

dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schema