Pratyush Yadav 7512eaf541 spi: cadence-quadspi: Fix dummy cycle calculation when buswidth > 1
SPI MEM deals with dummy bytes but the controller deals with dummy
cycles. Multiplying bytes by 8 is correct if the dummy phase uses 1S
mode since 1 byte will be sent in 8 cycles. But if the dummy phase uses
4S mode then 1 byte will be sent in 2 cycles.

To correctly translate dummy bytes to dummy cycles, the dummy buswidth
also needs to be taken into account. Divide 8 by the buswidth to get the
correct multiplier for getting the number of cycles.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20201222184425.7028-5-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06 13:08:44 +00:00
2020-12-22 08:43:06 -07:00
2020-12-28 14:21:31 +00:00
2020-12-22 12:55:07 -08:00
2020-12-27 15:30:22 -08:00

Linux kernel
============

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Please read the Documentation/process/changes.rst file, as it contains the
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