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628e0a0118
J722S SoC has two instances of SERDES namely SERDES0 and SERDES1 and one instance of PCIe namely PCIe0. Both SERDES0 and SERDES1 are single lane SERDES. The PCIe0 instance of PCIe is a Gen3 single lane PCIe controller. Since SERDES and PCIe are not present on AM62P SoC, add the device-tree nodes corresponding to them in the J722S SoC specific "k3-j722s-main.dtsi" file. Co-developed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240615081600.3602462-7-s-vadapalli@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.