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44a34dec43
Currently i915_gem_object_pin_to_display_plane() uses i915_gem_object_get_tile_row_size() to calculate the tile row size for the VT-d guard w/a. That's not really proper since i915_gem_object_get_tile_row_size() only works for fenced BOs, nor does it take rotation into account. Remedy the situation by calculating the VT-d guard size in the display code where we have more information readily available. Although the default guard size (168 PTEs now) should cover the more typical fb size use cases anyway, and only very large Y/Yf-tiled framebuffers might have tile row size that exceeds it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250122151755.6928-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.