Tony Lindgren 4097c9a64d bus: ti-sysc: Assert reset only after disabling clocks
The rstctrl reset must be asserted after gating the module clock as
described in the TRM at least for IVA. Otherwise the rstctrl reset
done with module clock enabled can hang the system.

Note that this issue is has been only seen with related IVA changes
that we do not currently have merged. So probably no need to apply
this patch as a fix.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 12:57:15 +02:00
2020-10-25 15:14:11 -07:00

Linux kernel
============

There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.

In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``.  The formatted documentation can also be read online at:

    https://www.kernel.org/doc/html/latest/

There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.
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