Imre Deak 36a3efb32e drm/i915/cx0: Zero Cx0 PLL state before compute and HW readout ...

Ensure Cx0 pll state is initialized to zero before any computation or HW
readouts, to prevent leaving some parameter in the state uninitialized
in the actual compute/HW readout functions later.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-14-mika.kahola@intel.com

2025-11-19 13:24:22 +02:00

..

drm

drm/i915/cx0: Zero Cx0 PLL state before compute and HW readout

2025-11-19 13:24:22 +02:00

host1x

gpu: host1x: Use dev_err_probe() in probe path

2025-09-11 19:12:53 +02:00

ipu-v3

gpu: ipu-v3: Switch to irq_find_mapping()

2025-05-16 21:06:12 +02:00

nova-core

Merge tag 'drm-next-2025-10-01' of https://gitlab.freedesktop.org/drm/kernel

2025-10-02 12:47:25 -07:00

trace

gpu/trace: make TRACE_GPU_MEM configurable

2025-07-08 09:34:47 -07:00

vga

vga_switcheroo: Use pci_is_display()

2025-07-17 15:30:13 -05:00

Makefile

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