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The RTL8367S can mux its embedded SerDes to external interface 1, which is typically used to connect the switch to a CPU port. The chip info table already declares SGMII as a supported interface mode for this chip, but the driver only implements RGMII so far. Implement SGMII support as a phylink PCS, with the configuration sequence derived from the GPL-licensed Realtek rtl8367c vendor driver as distributed in the Mercusys MR80X GPL code drop: - Add accessors for the SerDes indirect access registers (SDS_INDACS), through which the SerDes internal registers are reached. - Register a phylink_pcs for the SerDes, selected from mac_select_pcs for the SGMII interface, so the SerDes handling lives in the PCS operations rather than in the MAC operations. - Probe the SerDes tuning variant from the chip option register once at setup. The vendor driver keeps two sets of SerDes tuning parameters and selects between them based on this option; only the variant for a non-zero option (which all RTL8367S parts seen so far report) has been validated on hardware, so the SerDes interface modes are only advertised in that case. An unsupported variant thus fails at phylink validation time instead of at link configuration time. - Keep the embedded DW8051 microcontroller in reset and disabled. The vendor driver loads firmware into it to manage the SerDes link, but analysis of that firmware shows it only duplicates the link management phylink already performs: it polls the port status and writes the external interface force registers behind the driver's back. - Clear the line rate bypass bit for the external interface, tune the SerDes with the vendor-prescribed parameters, mux the SerDes to MAC8 in SGMII mode and only then take the SerDes out of reset, as the vendor driver does. - After deasserting the SerDes reset, reset the SerDes data path via the SerDes BMCR register to flush the FIFOs and resync the PLL. This mirrors what the vendor firmware does right after deasserting the SerDes reset, and ensures a clean link state from cold boot. - Force the SGMII link parameters (link, speed, duplex) in the SDS_MISC register from pcs_link_up(). SGMII in-band autonegotiation is not implemented, so only fixed-link and conventional PHY setups are supported, just like RGMII. This is reported to phylink through pcs_inband_caps() returning LINK_INBAND_DISABLE, so phylink never selects an in-band-enabled negotiation mode for this PCS. - Program the SerDes pause enables in SDS_MISC from the resolved pause modes when forcing the MAC external interface in mac_link_up, as the vendor driver does, rather than leaving whatever state the boot firmware left there. Flow control testing shows these bits, not the MAC force pause bits, gate pause on the SerDes external interface. This is done in the MAC layer because pcs_link_up() carries no pause information. - Implement pcs_get_state() by reading the link status from the SerDes, with the forced speed and duplex read back from SDS_MISC. Although the supported fixed-link and conventional PHY setups do not use it, the PCS owns the SerDes link state, and phylink consults pcs_get_state() to track the physical link when operating in in-band mode with autonegotiation disabled. The SerDes has no link interrupt wired up, so the PCS sets its poll flag. Tested on a Mercusys MR80X v2.20, where the RTL8367S is connected to the SoC over SGMII. Suggested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Suggested-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Suggested-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Signed-off-by: Johan Alvarado <contact@c127.dev> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Reviewed-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Tested-by: Stanislaw Pal <kuncy7@gmail.com> Link: https://patch.msgid.link/20260711-rtl8367s-sgmii-v6-1-88f7944ddca7@c127.dev Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Linux kernel ============ The Linux kernel is the core of any Linux operating system. It manages hardware, system resources, and provides the fundamental services for all other software. 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